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2015-11-19 Keysight channel simulator features PAM-4 capability
Developed in collaboration with leading PAM-4 SerDes IC vendors, the ADS channel simulator claims to provide a trusted bit-by-bit simulation engine for PAM-4.
2005-02-22 K-Micro expands ASIC portfolio
Kawasaki Microelectronics (K-Micro) has expanded its ASIC intellectual property (IP) portfolio with the additions of fast-lock clock and data recovery (CDR) for fiber-to-the-premises (FTTP) applications, 10Gbps Serdes with optional adaptive receive equalization technology for backplane applications, and PCI Express technology for networking, storage, and consumer applications.
2002-07-16 It's show time for Infineon
Infineon's broadband optical IC is capable of providing one-stop-shopping capabilities for line-card access devices.
2009-01-23 IP core enables next-gen 40Gbit/s systems
Lattice Semiconductor has announced the availability of its 40Gbit/s Serdes framer interface, Level 5 (SFI5) IP core, which uses 17 Serdes channels in the LatticeSC/M devices, including the Lattice SFI5 soft IP core, and enables flexible and high-performance, next-generation 40Gbit/s systems.
2015-05-12 Impact of piling on package manufacturing
To accomplish various performance enhancements, packaging engineers should consider intriguing combinations being constructed at the chip to package level.
2002-11-20 How to Validate BLVDS SER/DES Signal Integrity Using an Eye Mask
This application note contains information that will help you validate signal quality on a BLVDS SER/DES link.
2001-03-27 How To Solve The Communication Interface Bottleneck Problem
This paper discusses the implementation of a Gigabit (PHY) transceiver with serdes function as a good solution for eliminating the bottlenecks in communication interface.
2014-10-16 How to improve FPGA comms interface clock jitters
Know how external phase locked loops can be used to resolve problems faced when dealing with clock jitter in FPGA-based high-speed communications interfaces such as SerDes.
2003-12-16 How to add value to MSA optical transceivers
The evolution of today's optical transceivers and transponders is driven by MSA, which establish a standard for optical and electrical characteristics, module form factor, and pin functions of optical transmitters and receivers.
2002-06-28 High-speed data serialization and deserialization (840Mbps LVDS)
This application note addresses the circuits, including Xilinx's Virtex-II devices, that are capable of transferring up to 16 data channels at up to 840Mbps each for an aggregate data transfer link of over 13Gbps.
2005-11-16 GbE transceivers ignite port-count explosion
Ethernet's increasing bandwidth requirement is driving switch-router equipment designers to build scalable systems.
2006-08-31 Fujitsu unveils three new macros for ASIC designs
Fujitsu Microelectronics America has introduced a trio of new macros for custom ASIC designsa Serial ATA PHY storage interface, a 10Gbps clock data recovery transceiver and a serdes macro that is compliant with PCI Express version 1.0a.
2007-03-16 Fujitsu makes CMOS IC with 40-44Gbps CDR rate
Fujitsu Laboratories of America and Fujitsu Laboratories have developed the industry's first CMOS IC that performs CDR at 40Gbps to 44Gbps, enabling the future implementation of 40Gbps optical Serdes modules.
2012-06-13 FPGAs boast high density for wired, wireless communications
Lattice Semiconductor's low cost, low power LatticeECP4-190 FPGA features 6G SERDES in low cost packages, powerful DSP blocks and built-in hard IP-based communication blocks.
2009-03-16 FPGA solution enables low-cost PCIe bridge
Lattice Semiconductor has announced the availability of a low-cost programmable PCI Express-to-High Speed Serial (HSS) bridge for the CAP12-120, a SOHO VoIP platform running on Intel architecture. This bridge design has been implemented in the LatticeECP2M FPGA. The solution uses the LatticeECP2M's low power, high-performance Serdes and a Lattice PCIe IP core.
2002-07-11 Flexible transceiver protects backplane investments
A CMOS octal serdes transceiver from Mindspeed Technologies promises to facilitate seamless system upgrades from OC-12 to OC-48 or OC-192 speeds.
2004-11-16 Faraday platform targets L4 to L7 switching
With the emergence of structured-ASIC technology, Faraday saw another alternative: a platform ASIC with a large, embedded array of metal-configured logic.
2006-10-10 Faraday launches 'state-of-the-art' structured ASIC
Faraday Technology recently launched NC Express, said to be the most state-of-the-art device in the company's Composer Structured ASIC product line targeting communication, networking and enterprise applications.
2009-08-18 Equalizer suits copper cable assemblies
From Maxim Integrated Products comes the MAX3986, a 1Gbit/s to 10.3Gbit/s, quad linear equalizer for copper interconnects.
2010-02-10 Engineers push beyond 10Gbit Ethernet limit
At three separate industry events, engineers said they are gearing up to deliver in 2011 chips that can handle serial data streams running at 25Gbit/s to drive next-generation 100- and 400Gbit/s networks.
2005-11-16 Duobinary signaling spurs edge equalization
Duobinary signaling achieves data rates greater than 10Gbps even in a limited bandwidth.
2014-11-12 Determine acceptable jitter level in embedded design
Learn about the nuances of clock jitter specifications, and know how to determine the acceptable level of jitter early on in the development cycle to prevent dire impact on end product release schedules.
2005-04-21 Deserializers lessen wires, traces
Maxim introduces the latest members of its high-speed LVDS SerDes family, which are hot-swappable 21-bit, DC-balanced LVDS deserializers
2012-02-02 DEF: The best bet to fight crosstalk
While there is no fail safe solution for measuring the effects of cross talk on a chip, the best existing solution is decision feedback equalizer, a type of circuit that can be inserted into a design to minimize crosstalk.
2005-09-12 Cypress' video cable equalizers deliver SD signals over 400m
Cypress Semiconductor announced two new multirate video cable equalizers targeted at the professional video market.
2009-02-09 Coming soon: 25Gbit/s backplanes
Experts at a DesignCon panel agree that Ethernet will shift up to 40- and 100Gbit/s data rates using 10Gbit/s and eventually 25Gbit/s serial channels in as few as three years.
2003-05-26 Broadcom transceivers transmit up to 622Mbps
The company has released a custom three-chip serial backplane transceiver chipset for Foundry Networks' metro/service provider router architecture.
2003-03-06 Broadcom to expand networking line with Gadzoox acquisition
Broadcom Corp. has acquired a substantial portion of the assets of Gadzoox Networks Inc.
2014-11-28 Boost data rates with clock generators
To meet the intensifying demands for higher data rates, high-speed networking and data centre equipment calls for frequency-flexible clock generator IC solutions to support faster data rates.
2007-02-01 Boost AMC performance with multicore design
Silicon vendors are increasingly turning to designs using multiple processing cores on a single die to meet increasing performance requirements.
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