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2005-10-24 ASIC breaks $10 barrier for PCI Express bridging applications
LSI Logic has added a new slice in it RapidChip IntegratorQS Platform ASIC family, the RC11Si204, which provides peripheral and storage media developers with two lanes of GigaBlaze serializer/deserializer (SerDes).
2003-05-20 Artisan establishes analog, mixed-signal business unit
Artisan Components Inc. has formed an analog and mixed-signal business unit.
2003-03-21 Arrow, Velio form strategic alliance
Velio Communications Inc. and Arrow Electronics Inc. have entered into a strategic agreement making Arrow a key sales and distribution partner for Velio's communications ICs.
2004-12-01 Analyzing high-speed serial links
Learn a new simulation/statistical technique that accurately analyzes Serdes performance in systems, delivering 3Gbps data rates and beyond.
2008-09-09 Analyzer revs up serial comms implementation
From Great River Technology comes the HOTLink Serial Link Analyzer (HSLA), a tool to accelerate implementing and troubleshooting video systems using HOTLink and HOTLink II Serdes solutions from Cypress.
2004-12-16 AMCC extends switch fabric to 80Gb aggregate
The PRS Q-80G switch has an aggregate capability of 80Gbps and scales to 320Gbps through the use of eight separate chips.
2005-06-07 Altera, PMC-Sierra team up with protocol development system
Altera and PMC-Sierra announced the availability of a jointly developed multi-serial protocol development system that incorporates Altera's Stratix II EP2S90 FPGA and PMC- Sierra's PM8358 QuadPHY 10GX SERDES transceiver
2010-07-26 Alliance pushes GigaChip interface
MoSys Inc. has announced the launch of the GigaChip Alliance, an ecosystem of semiconductor device suppliers in support of the GigaChip Interface.
2004-11-02 Agere, Troika to offer storage services technology
Agere Systems and Troika Networks Inc. will offer products based on Troika's ReadyPath technology next year.
2004-12-16 Agere rolls Ether switch, octal PHY
The company has launched a powerful entrant into the market of L2 Ethernet switches and an octal physical-layer chip that complements it.
2002-10-22 Agere 80Gbps switch performs triple duty
Agere Systems is shipping an 80Gbps switching processor that performs per-channel rate grooming for multiservice switching of voice and data signals.
2013-06-28 Advantest rolls test sol'ns for mass-storage, CE devices
The T2000 platform, configured with 8Gsps waveform generator/8GHz digitizer module and 8Gbit/s digital module can handle fast SerDes PHY-layer interfaces and complex analogue waveform challenges.
2007-02-01 Address SI issues in high-speed board design
This article discusses some of the SI challenges and the factors associated with high-speed interface designs that are enabled with key features of a RapidIO switch.
2010-04-20 A/V clock generator delivers 40ps jitter
National Semiconductor has released a triple-rate audio/video clock generator that eliminates the need for external clock conditioning in professional and broadcast video equipment.
2007-11-07 A technical overview of RapidIO
The RapidIO protocol defines both serial and parallel PHY interfaces with multiple lane widths, giving developers the ability to trade off between latency, data rate, physical channel length and number of differential pairs used based on the needs of a particular application.
2006-03-16 A designer's guide to CMOS RF models
A BSIM4 model that is well correlated at RF can be highly accurate from DC to microwave frequencies over all operating conditions.
2003-11-17 10Gbps serial data over copper backplanes - a reality
The communications industry has all the building blocks to create a system that can deliver aggregate bandwidth of tens of terabit-per-second efficiently brought about by the availability of 10Gbps NRZ serial technology.
2007-07-02 10GbE chips migrate to computer servers
Broadcom Corp. is throwing its hat in the ring of chipmakers bringing 10Gbps Ethernet to computer servers. The increasing activity is a sign that 10G Ethernet is ready to migrate from the big switch that aggregates data-center traffic down to the mainstream server that generates and processes it.
2007-12-06 Virtex-5 FPGA solutions fit SPI-4.2, SFI-4.1 interfaces
Xilinx has announced complete solutions for the Optical Internetworking Forum (OIF) SPI 4.2 and SerDes Framer Interface (SFI) 4.1 standards, the industry's highest performance channelized packet interfaces.
2008-01-25 Stratix II GX FPGAs prop up 50Gbit/s SFI-5 interface
Altera Corp. has announced SERDES Framer Interface Level 5 (SFI-5) standard support in their Stratix II GX FPGAs with embedded transceivers, providing a 40-50Gbit/s interface for high-performance optical communications applications.
2004-07-01 SONET CMOS transceiver hits 10Gbps
Xignal develops a single-chip full-rate 4:1 Serdes chip consuming <1W in a standard 0.13?m CMOS technology.
2002-09-06 ServerWorks adds GbE to server chipset
ServerWorks Corp. has integrated GbE and serdes technology into its server core logic, leveraging the communications capabilities of its parent company, Broadcom Corp.
2012-01-25 Semtech expands portfolio with Gennum buy
Semtech's CEO said the deal would combine its company's 40Gb/s and 100Gb/s SerDes products with Gennum's 1Gb/s to 25Gb/s optical devices.
2004-05-28 Intersil expands analog comms line with BitBlitz acquisition
Intersil Corp. will pay $2.5 million in cash for the serializer/deserializer (serdes), transponder product line and the intellectual property of privately-held BitBlitz Communications.
2002-05-02 Internet Machines to use Rambus' RaSer serial link technology
Rambus Inc.'s RaSer serializer/deserializer (SerDes) cell has been incorporated into Internet Machines' SE200, a full duplex 200Gbps single-chip switch element and TMC10, a full duplex 10Gbps single-chip, wire-speed traffic management co-processor, under a license agreement between the two companies.
2004-07-01 Hitting the 10Gbps backplane mark
To reach the 10Gb backplane plateau, designers need Serdes that can accommodate dynamic environmental conditions.
2012-07-10 Gigabit serial links paves way for multi-core scalability
Built on top of the serdes for data-intensive apps, gigabit serial interfaces minimize system cost and pin count while improving parallelism, performance and capacity.
2004-09-01 From telecom backplanes to computer servers
Getting to next-gen backplane speeds of 10Gbps has sparked a debate around Serdes approaches and the requirements of passive-backplane and connector channels.
2014-04-15 FPGA breaks high-density, power-hungry barrier
The ECP5 FPGAs from Lattice Semiconductor feature a very compact form factor with high functional density, offering up to 85K LUTs in 10mmx10 mm, 0.5mm pitch package with SERDES.
2005-06-28 Denali, TaraCom offer SATA IP solutions
Denali Software Inc. and TaraCom Integrated Products Inc., a provider of SerDes technology, have disclosed the availability of comprehensive intellectual property (IP) solutions for Serial ATA (SATA) design, verification and deployment.
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