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What is an EEPROM?

Electrically Erasable Programmable ROM or EEPROm is a rewritable memory chip that holds its content without power. The two main categories of EEPROM interfaces are Serial bus and Parallel bus. These interfaces require between 1 and 4 control signals for operation, resulting in a memory device in an 8-pin (or less) package. Most common EEPPROM serial interface types are SPI, I虏C, Microwire, UNI/O, and 1-Wire.聽 (Souce: EE Times, Wikipedia http://en.wikipedia.org/wiki/EEPROM)

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2003-12-01	Philips releases Bluetooth SiP solution Royal Philips Electronics has unveiled the industry's first complete plug-and-play Bluetooth solution in a single, low-cost chip package.
2005-10-21	Packaging conference to explore 3D, SIP Building on the first International Wafer-Level Packaging Congress (IWLPC) event, the second IWLPC conference will explore three-dimensional (3D) chip-packaging and other technologies.
2006-10-19	Optimal announces enhancements to SiP analysis suite Optimal is announcing chip/package/PCB co-design support in the form of enhancements to its Optimal SiP Analysis Suite.
2005-03-09	Nortel, SIPquest demo SIP-based services to wireless devices Nortel is collaborating with SIPquest, a leading developer of Session Initiation Protocol (SIP) based IP telephony software applications, to develop applications that will allow operators to deliver SIP-based multimedia services to wireless devices.
2006-10-02	New tools, scalable methods facilitate SiP design EDA-software providers must develop new tool functionality and present scalable design methods and flows in SiP.
2005-07-08	Mindspeed, Netbricks enhance PBX with VoIP processor, SIP Mindspeed Technologies Inc. has announced an enhanced system-on-chip voice-processing solution for enterprise PBX, gateway, and voice-enabled router equipment with the integration of Netbricks' SIP-Bricks session initiation protocol (SIP) software into it's Comcerto integrated VoIP processor.
2008-02-05	Linear Tech debuts SiP signal chain receiver modules Linear Technology has introduced the LTM9001, the first in a series of SiP signal chain receiver modules using its ?Module technology.
2007-02-16	LIN node SiP rolls for automotive actuator apps Atmel's new multichip modules combine an MCU and a LIN SBC in a single SiP designed for automotive actuator applications typically found in comfort electronics as well as in powertrain applications.
2010-11-24	Intel SIP chip combines Atom, FPGA Intel Corp. unveiled the first members of a family of system-in-package (SIP) products announced last September.
2004-05-13	Inapac solution integrates DRAM in SiP apps Inapac has announced a solution for integrating DRAM into advanced SiP applications.
2002-12-10	Hitachi SiP to replace SoC in portable apps Hitachi Ltd has developed the HJ931 series of System In Package (SiP) that combines the company's SuperH microprocessor and multiple memory chips in a single package using three-layer stack structure.
2002-05-03	Global UniChip announces USB 2.0 SIP Claimed to be the first device controller and PHY coverified USB 2.0 solution from Taiwan, the Medusa USB 2.0 device controller SIP from Global UniChip Corp. supports the USB 1.1 and 2.0 specifications and uses a UTMI standard interface.
2004-12-01	Getting inside the SiP Design teams are taking a harder look at the SiP alternative to conventional SoC design as the advantages of combining multiple dice into one package have been well-documented.
2005-06-01	Freescale rolls out SiP ZigBee solution Freescale expanded its product offerings for wireless monitoring and control applications by delivering a cost-effective system-in-a-package ZigBee solution
2002-09-24	EMCO SIP dc/dc converter delivers up to 90V EMCO's single in-line-packaged dc/dc converter accepts an input from 2.7V to 6.7V source and delivers a programmable output from <10V to 90V.
2004-09-16	Embedded VoIP implementations using SIP Broadband adoption has laid the pavement for mass-market VoIP implementation. Find out the advances that have made 2004 the year of VoIP.
2008-08-27	Cadence tool steps up IC package, SiP designs The release of SPB 16.2, due in November of this year, from Cadence Design Systems, delivers advanced IC package/system-in-package miniaturization, design cycle reduction and DFM-driven design, along with a new power integrity modeling solution.
2003-08-11	ASAT SiP includes flip-chip, wirebond processes ASAT Holdings Ltd has developed a system-in-package that integrates multiple components into a single high performance module.
2006-09-14	Amkor selects Cadence for SiP design centers Cadence Design Systems Inc. announced that Amkor Technology Inc. has standardized on the new Cadence SiP design products and methodologies for use in their worldwide design centers.
2012-04-17	Addressing integration concerns with SiP technologies Learn about the benefits and drawbacks of system-in-package technologies.
2014-06-05	Address SoC routing congestion with 2.5D SiP The best of both worlds approach that the electronics industry has come up with to solve a design dilemma is the System in Package (SiP) in a 2D package.
2007-05-02	16Mbit SDRAM design cuts SiP/MCP costs Inapac Technology is sampling a 16Mbit SDRAM design that enables SiP and MCP producers to minimize cost of ownership while achieving production quality and reliability.
2005-05-02	ZyCube duo has big plans for 3D circuits Two executives from Zycube Co. Ltd lay the road map for significant trends in 3D technology.
2005-12-01	Where the silicon hits the board Amkor's Chris Scanlan talks about the evolution of stacking technology and the road to environmentally friendly packages.
2003-05-30	Two-piece processor removes 'noise' from images A Silicon Valley company has developed a two-piece image processor chip set that removes noise from image files in digital cameras.
2007-03-01	Two firms tip VoWLAN solutions Siemens AG's Mobile Enterprise group is launching the HiPath MobileConnect product for unified voice networks, while newcomer Divitas Networks Inc. is calling its infrastructure play a mobile-mobile convergence tool.
2000-07-01	Trends in multi-chip package integration Wafer level packaging (WLP) technologies have recently attracted much development activity, innovation and investment. Here are some of the opportunities and obstacles for WLP and multi-chip package integration approaches.
2002-01-04	Tower licenses DSP Group's DSP core for Fab 2 Semiconductor foundry Tower Semiconductor Ltd has licensed DSP Group's Teak DSP core, which is expected to expand Tower's semiconductor IP (SIP) offering in Fab 2.
2016-03-15	The endless pursuit of smaller packages In this article, we explore the creativity in semiconductor package integration, while anticipating the release of the Samsung's Galaxy S7 and the iPhone 7.
2013-05-06	Terminal Emulation tool bolsters Android support The latest version of the Wavelink Terminal Emulation for Android has added customisable SIP keyboards which eliminate the need to toggle between different command and control keyboards.