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2002-03-12 Synopsys, UMC develop signal-integrity test chip
Synopsys and UMC announced they have developed the ATG-SI test chip for researching signal-integrity effects on designs developed in UMC's 0.13?m Fusion process
2003-03-07 Silicon Metrics adds signal integrity tool
Silicon Metrics has added to its library development suite a new tool that performs signal integrity noise characterization.
2007-01-17 Sigrity ports signal integrity tools to Linux platforms
Sigrity Inc. has ported its power and signal integrity tools to 64-bit Linux platforms, promising to speed signal-integrity analysis for chip, package and board applications
2009-02-05 PI tool for PCB promises accuracy
Mentor Graphics Corp. threw its hat in the ring of EDA vendors addressing power integrity in the PCB space, rolling out HyperLynx PI (power integrity), which is billed as easy-to-use and promises accurate analysis of power plane structures
2006-12-15 Mathworks adds signal integrity to RF Toolbox
Providing a signal-integrity analysis capability for broadband backplanes and PCB traces, The Mathworks is rolling out the RF Toolbox 2, which adds time-domain capabilities to this Matlab add-on package
2006-02-09 Firm offers sub-$700 PCB signal integrity analysis suite
What-If Design Software LLC is rolling out its AS/ SIST tool suite over the Internet for $695
2002-08-15 Cadence releases revised signal integrity tool
Cadence Design Systems Inc.'s new version of its CeltIC signal integrity solution has greater capacity, performance and accuracy than the previous version of the tool.
2001-10-01 Attending to signal integrity in complex designs
This technical design article focuses on the signal integrity tools required to enhance the facilitation of IC design and processing
2004-02-17 Apache, Xilinx analysis tool eyes MGT apps
Apache Design Solutions and Xilinx have released a signal integrity tool that uses the Apache Nspice simulator.
2002-06-13 Ansoft signal-integrity tool produces accurate 3D models
Equipped with the company's multi-partial element equivalent circuit technology, the Spicelink v5.0 signal-integrity tool from Ansoft Corp. is capable of producing accurate, three-dimensional, distributed models for gigabyte data-rate designs.
2002-04-05 Ansoft signal-integrity tool has full-wave analysis engine
With a full-wave analysis engine, the SIwave signal-integrity tool generates both frequency- and time-domain results, and analyzes complex PCBs and IC packages consisting of multiple, arbitrarily shaped power and ground layers, and any number of vias and signal traces.
2003-08-22 'Modular' signal integrity tool starts at $250
Claiming to offer the first "fully modularized" signal integrity tool for high-speed chips, IPC is licensing individual modules from its IFS Pro software.
2004-04-01 Zuken revamps PCB prototyping tool
Enhancements to the latest version of Zuken's PCB virtual prototyping tool, Hot-Stage 4.2, allow verification of complete electronic systems
2004-09-16 Unified data model brings signal integrity
Separate EDA environments and databases prevent analyzing signal integrity early in the design cycle, where it is most critical
2006-07-01 Tool suite handles design complexity
Altera Corp. recently launched its Quartus 6.0 tool suite, which includes a timing analyzer that's said to pave the way for next-generation 65nm FPGAs
2006-08-01 Tool startups bet on autonomy
Two analog/mixed-signal design automation startups recently stepped into public view, chasing a goal that has eluded most of their predecessors: building a viable, independent company that doesn't fold or end up being acquired
2003-06-02 Tool analyzes power dynamically, at cell level
Apache launched its 2nd product designed for power analysis, the RedHawk-SDL.
2006-12-13 Synthesis tool meets complex CMP design rules
The new synthesis tool from Blaze DFM Inc. inserts dummy fill patterns into a design layout and is said to optimally meet complex CMP design rules without requiring complicated scripts
2008-01-29 Synopsys upgrades signal integrity analysis suite
Synopsys has announced that the 2007.12 release of its PrimeTime suite has set a new performance standard for both static timing and signal integrity analysis, accelerating turnaround time and design closure for today's nanometer designs
2005-04-01 Statistical tool shift: It's all in the timing
Startup Extreme DA's mission is 'variation-aware' IC analysis. Can four guys in borrowed office space make a big impact on chip design?
2004-12-31 Software lets signal integrity analyzers meet PCI Express 1.1 specs
Wavecrest announced that its SIA family of signal integrity analyzers meet the new PCI Express 1.1 Specification defined by the PCI-SIG
2007-01-29 SiP lacks EDA tool support
System-in-package (SiP) may be an increasingly attractive alternative to SoCs, but EDA tool support is sorely lacking
2015-03-18 Signal/power integrity device targets high-speed PCB design
The HyperLynx SI/PI tool from Mentor Graphics offers tools for pre- and post-layout signal integrity, timing, crosstalk and power integrity analysis to eliminate design re-spins.
2007-03-16 Signal-integrity issues plague multigigahertz era
Engineers want a new bag of tricks to manage signal integrity as data rates soar into multigigahertz territory
2007-07-03 Signal integrity toolkit checks jitter, boasts new Serdes lib
Agilent has pulled the wraps off a new toolkit that identifies and analyzes sources of jitter in multi-gigabit communication link designs.
2001-05-16 Sequence Design offers tool for timing closure
Sequence Design has combined different technologies in a "design closure" product that can optimize timing and signal integrity concurrently before and after routing
2004-06-01 Prolific offers tool to assure signal integrity
Prolific announced that the latest version of its timing optimizer works with Synopsys' PrimeTime SI static tool
2008-01-23 Oscilloscope function steps up system integrity analysis
Vitesse Semiconductor claims its high-speed IC-based oscilloscope function will significantly change the economics of signal integrity analysis and network reliability
2006-10-16 One timing tool serves 65nm, 45nm designs
Cadence Design Systems introduced the Encounter Timing System, described as a "signoff-quality" timing product for nanometer SoC design.
2007-11-07 Model instruments to improve signal integrity simulation
Including the effects of the test system into circuit simulators improves the understanding of the design and reduce the cost of design turns.
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