Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Advanced Search > SoC design

SoC design Search results

total search2531 articles
2011-02-14 Ensure first-day SoC software success
Learn how integrated ecosystem makes it easy to create or download models that allow design teams to combine them in various ways
2014-11-06 Enhance SoC efficiency with multi-bit flip-flops
Here's a look at the architecture of multi-bit flip-flops, its merits and drawbacks. It also tackles the results of its implementation in a particular design and the various areas of concern
2014-06-23 Engineers handpick 10 best free analysis, design tools
The list includes what is considered a viable alternative to Excel, the R Project, and mathematical tools such as Sage and GNU Octave.
2002-09-16 Enabling VDSM SoC revolution with mixed-signal design
This article demonstrates how incorporating analog/mixed-signal design automation to existing chip trends can revolutionize VDSM SoCs
2001-03-01 Embedded test complicates SoC realm
SoC devices today implement a variety of specialized microelectronic functions. Those functions, sometimes with embedded systems, typically comprise of hardware or software design objects.
2002-09-24 Dolphin Integration: Taiwan foundries acquiring design capabilities
Outsourcing fab responsibilities to Taiwan was adopted by many companies to deverticalize the chip industry. But design changes are slowly creeping in
2005-08-16 DFT, DFM tests assure quality SoC design
Learn the importance of design-for-manufacturability and design-for-test in ramping up advanced products in deep-submicron technologies
2002-04-16 DFT confronts test cost in design run
This technical article offers a synopsis of the challenges in SoC design, particularly with regard to test costs.
2008-06-12 Design tools eye ARM core for various apps
Cyclos announced a proof-of-concept processor implementation using its platform and design flow. This can be used to achieve low-power, resonant-clock implementations of synchronous ASICs and SoCs without changes to their development and verification environments
2007-02-26 Design low-power multiprocessor chips
The demand for higher performance and more features has only served to increase total system power consumption.
2012-04-30 Design for power methodology: From architectural plan to signoff
Here's a look at a holistic design for power methodology that spans from architectural decisions through front-end design to physical implementation and sign-off
2002-06-06 Denali IP core manages SoC memory bandwidth
Denali Software Inc. has enhanced its Databahn memory controller IP core by adding an ability to regulate and optimize memory bandwidth in an SoC design.
2011-10-05 Debug platform eases SoC design, verification
SpringSoft's open platform allows the creation and sharing of custom applications through the company's debug system.
2008-08-18 DDR IP solutions speed up SoC design operation
Synopsys has introduced a full range of silicon- proven DesignWare DDR IP solutions for SoCs that need an interface to high-performance DDR3, DDR2 and DDR memory subsystems.
2005-04-18 DATE minds offer an array of fixes for SoC design
Designing high-performance SoCs needs a breakthrough from system-level design through manufacturing, according to DATE
2002-02-12 DATE 2002 conference to spotlight IP, SoC issues
Intellectual property for use in SoC designs will be a major topic at this year's Design Automation and Test in Europe conference.
2002-04-05 Cypress software toolset reduces MCU design time
Cypress Microsystems Inc. has provided the Programmable SoC Designer Software Tool Set for its PSoC MCUs, enabling design engineers to perform dynamic reconfiguration on their designs and reduce development times by up 30 percent.
2005-01-17 Cycle-accurate models for SoC testing
The article examines why cycle-accurate models have not been adopted, why they are needed and what the best solution is.
2004-11-09 CoWare upgrades SystemC-based SoC modeling tools
CoWare released a significant revision of its SystemC-based ConvergenSC SoC design tools.
2006-12-01 Configurable sections within an SoC
Regardless of the fabric used, designers should be aware of a few do's and don'ts when designing configurable sections within an SoC
2008-07-03 Confab stresses potential thermal crisis in IC design
At the Design Automation Conference in Anaheim, California, an educational panel addressed the thermal issue in IC design. Two key questions raised were when will this issue be emerging as a crucial concern? What are the solutions to solve this potential crisis
2004-07-01 CMOS RF SoC design shoots for 60GHz
The article describes a potential design of an RF SoC that is backward-compatible with a 60GHz WLAN systems.
2002-07-29 CMC licenses ARM design technology
Canadian Microelectronics Corp. has joined the ARM University Program, and licensed an ARM SoC design and prototyping package.
2014-07-22 Cloud provides chip design education to developing countries
SRC and SCI hope to grow a whole new crop of qualified SoC design engineers in developing countries worldwide by deploying EDA hardware and software in a private cloud.
2002-05-21 Chipmakers see early payoffs of design reuse
In a testament to design-for-reuse, a 10-member Motorola Inc. design team took a chip to tapeout in a hectic two-and-a-half months, engineers told the Custom Integrated Circuits Conference
2006-11-02 Chartered Semi invests in Taiwan-based design services firm
Chartered Semiconductor disclosed early this week an investment in Taiwan-based design services firm Gateway Silicon that the foundry said would broaden its range of solutions
2008-06-12 Chartered acquires stake in Taiwan design firm
Foundry Chartered Semiconductor Manufacturing has made a strategic investment in Socle Technology Corp., a Taiwan-based SoC design services and embedded platforms firm.
2008-07-09 Carbon Design acquires ARM SoC Designer
Development tools supplier Carbon Design Systems has entered an agreement with ARM Ltd, under which Carbon will take over future development, support and sale of the SoC Designer tool.
2014-12-04 Calypto intros high-level synthesis tech to speed up design
The Catapult 8 with the configurable hierarchical design architecture is built on a completely revised architecture that expedites design and verification closure, pushing widespread adoption of HLS
2009-10-23 Cadence, ARM co-develop next-gen SoC design flow
Cadence and ARM will combine their technologies to create a next-generation SoC design flow.
Bloggers Say

Bloggers Say

See what engineers like you are posting on our pages.

Back to Top