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What is an embedded system?
An embedded system refers to any electronic system that uses a CPU chip, but that is not a general-purpose workstation, desktop or laptop computer. Embedded systems generally use microprocessors, or sometimes custom-designed chips or both. It is used in various applications such as vehicles, machine tools and consumer electronics.
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2006-10-04 Yogitech unveils 'first' Open Core Protocol UVC
Yogitech, a provider of design and verification technology, announced what it touts as the industry's first mixed-language Open Core Protocol universal verification component.
2004-03-25 Verisity adds accelerators, emulators to Axis line
Verisity Ltd plans to add dynamically programmable processors to the XoC, Xtreme, and Xcite acceleration and emulation products it acquired in the deal last month for Axis Systems Inc.
2003-11-25 Translogic HDL Companion targets complex designs
Translogic BV has announced that it has made its HDL Companion 1.0 available for free evaluation.
2006-10-16 Transaction assertions boost Jeda NSCa suite
Jeda Technologies is adding transaction-level assertion to native SystemC assertion (NSCa), a verification automation tool suite introduced in February.
2004-12-17 Toshiba uses Forte synthesis for next-gen design flow
Toshiba Corp. has chosen Forte Design Systems' Cynthesizer SystemC behavioral synthesis product for use in their SystemC design flow.
2006-01-02 SystemVerilog won't kill 'e' language
Backers of 'e,' which is nearing IEEE standardization, say that rumors of the language's death are exaggerated.
2002-10-18 Synopsys, OCP-IP codevelop SoC methodology
Synopsys Inc. and the Open Core Protocol International Partnership has announced the development of a SystemC modeling methodology for OCP-based SoCs.
2005-06-22 Synopsys, IBM collaborate on PowerPC processor models
Synopsys announced fully synthesizable versions of IBM's PowerPC 405 and 440 processors as part of the DesignWare Star IP program.
2007-09-20 Synopsys delivers system-level library
Synopsys has introduced the DesignWare System-Level Library that provides SystemC transaction-level simulation models for assembling virtual platforms.
2007-01-26 Synopsys contributes virtual platform tech to OSCI
EDA software provider Synopsys Inc. has contributed a key technology for the development of Virtual Platforms based on SystemC to industry group Open SystemC Initiative (OSCI).
2005-06-15 STMicro bares major breakthrough in SoC design
STMicroelectronics has revealed the publication of a book on chip design methodology.
2013-07-31 ST, ARM and Cadence team up for tool, model interoperability
The collaboration of ST, ARM and Cadence aims to increase model and tool interoperability for electronic system-level (ESL) design at the transaction-level.
2015-03-18 Speed up VDK dev't using Synopsys Virtualizer tool
The latest features in the Virtualizer tool enable virtual prototyping teams to create VDKs faster and with higher performance compared to using build-your-own SystemC-based modeling efforts.
2004-08-26 Sanyo adopts Forte's Cynthesizer for multimedia devices
Sanyo Electric Co. Ltd has adopted Forte Design Systems SystemC behavioral synthesis product, Cynthesizer, for the implementation of its high-performance designs for multimedia and other consumer semiconductor devices.
2005-02-18 Rhines draws roadmap for verification
Mentor Graphics Chairman and CEO Walden Rhines provided the DVCon conference here Tuesday (Feb. 15) with a roadmap for achieving progress in the battle for design verification productivity.
2003-09-01 Recycle RTL testbenches to verify IP models
Future work in the area of reusing RTL testbenches to verify TLM blocks will focus on fully automating the process, including automatic fault checking.
2007-01-16 New Bluesim supports virtual prototyping
Targeting an emerging niche within ESL design, Bluespec Inc. rolled out a new version of its Bluesim simulator that supports virtual prototyping for software development and hardware validation.
2008-03-10 More groups push standards for virtual prototyping
New players are expected to push forward efforts to create standards for virtual prototyping as the next wave in system and software development, to allow tools and simulation models from various suppliers work together.
2005-07-01 Mixed-signal simulation in design, verification
Find out how the Virtuoso AMS Designer solution simulates mixed-signal chips throughout design and verification
2004-02-16 Mentor Graphics reinforces verification platform scalability
Mentor Graphics has released its ADMS v4.0 with added language support for mixed-signal functional verification.
2006-02-01 Language standards from IEEE open choices
Once seen as competitors, SystemC and SystemVerilog languages appear to be settling into largely complementary niches.
2005-01-03 Integration drives embedded HW, SW development
Effective integration of hardware and software flows leads to a reduction in late design errors while improving overall efficiency.
2005-01-17 Inside a hybrid verification model
The combination of languages, tools, IP and methodologies has morphed the traditional ASIC design cycle into a 'hybrid model' process. Learn more.
2005-12-06 Forte, Summit team up on design and verification flow
Forte Design Systems and Summit Design announced their collaboration to deliver an integrated solution that combines the strengths of the Vista SystemC IDE and Cynthesizer SystemC synthesis products.
2004-05-12 Forte synthesis tool accelerates RTL delivery
Forte has disclosed that its Cynthesizer is the first behavioral synthesis product to offer an implementation path from SystemC to RTL, verification and co-simulation.
2006-01-25 Forte Design Systems unveils next-gen Cynthesizer
Forte Design Systems announced the availability of the next generation of its Cynthesizer electronic system level (ESL) synthesis product.
2007-01-24 Emulator handles 100 million gates at 20MHz
EVE SA has developed what it touts as the largest and fastest IC emulation product to date. ZeBu-XXL handles up to 100 million gates at up to 20MHz, and it supports both hardware and software verification.
2005-01-19 EDA startup preps sequential equivalency checker
Promising to ensure that high-level models match their RTL implementations, startup Calypto Design Systems this week is announcing its mission and its plans to field a sequential equivalency checker.
2004-03-08 EDA CEOs field provocative questions
In a broad-ranging panel discussion at the Design and Verification Conference (DVCon), moderator John Cooley asked EDA CEOs a variety of provocative questions - and received some spirited responses.
2004-02-05 DesignCon keynoter points to programming skills in the late-silicon age
The electronics industry is entering a new era - one in which embedded processors must function increasingly asynchronously.
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