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What is an embedded system?
An embedded system refers to any electronic system that uses a CPU chip, but that is not a general-purpose workstation, desktop or laptop computer. Embedded systems generally use microprocessors, or sometimes custom-designed chips or both. It is used in various applications such as vehicles, machine tools and consumer electronics.
total search233 articles
2008-06-02 Use system models for better verification
This article describes the system-level to RTL design and verification flow of a commercial graphics processing chip. In this flow, system models were developed to validate the arithmetic computation of video instructions and were then used to verify the RTL implementation using sequential logic equivalence checking.
2010-04-26 Understanding high-level synthesis design's advantages
It is vitally important to verify the design before performing high-level synthesis, not after. It is not effective to synthesize a design that does not work.
2004-11-22 Toshiba adopts Mentor ADVance MS tool in LSI designs
Mentor Graphics Corp. revealed that Toshiba Corp. has adopted its analog/mixed-signal HDL language, Verilog-AMS, for the design and verification of complex analog and mixed-signal LSI (large scale integration) designs.
2009-01-22 Tools support layered modeling based on TLM-2.0
Mentor Graphics Corp. has announced a scalable design methodology based on transaction-level modeling (TLM) that allows a single model to be taken from design concept to implementation.
2005-02-01 Tool vendors dispute report of downturn in ESL
Did the emerging ESL tools market take a
2007-05-18 Tool speeds up firmware debugging
Striving to meet the demands of firmware developers, Carbon Design Systems announced a new technology called "OnDemand" that speeds the performance of Carbon's Virtual System Prototype (VSP) environment for debugging.
2003-12-23 Tool promises parallelizing synthesis
Touting a new approach to parallelizing, high-level synthesis, the Center for Embedded Computer Systems at the University of California at Irvine has released its Spark synthesis tool to engineers. Available as a free download, Spark takes C-language input and produces register-transfer-level VHDL code.
2006-07-28 Tool enables designers to generate fast virtual prototypes
ARM announced the ARM RealView System Generator tool, which promises to enable platform providers to rapidly generate, by themselves, instruction-accurate virtual prototypes.
2011-02-23 TLM enables modeling for the AMBA protocol
Carbon Design Systems' Through Life Management (TLM) 2.0 solution for the AMBA protocol contains definitions and extensions for AMBA 3 AXI3, AHB, AHB-Lite and APB protocols at the loosely timed, approximately timed and cycle-timed levels of abstraction.
2016-05-16 The ideal union of PAM and Ethernet
Understand how various Ethernet speeds evolved through the utilisation of various pulse amplitude modulation (PAM) schemes.
2003-04-14 Tenison Verilog solution selected by Seaway
Tenison EDA announced that fabless semicon company Seaway Networks Inc. has adopted its Verilog/VHDL to C/C++ modeling solution.
2002-04-04 Technical program assembled for upcoming DAC
Hoping to convince designers that this year's Design Automation Conference is worth the trek to New Orleans, the show's committees have announced an innovative technical program.
2001-05-16 Syntax raises RTL abstraction level
A University of Toronto professor has proposed a new RTL abstraction syntax that he claimed can be implemented by a modest extension to traditional imperative programming languages.
2004-02-19 Synopsys, ARM to write SystemVerilog manual
Seeking to write the book on how to use SystemVerilog for verification, Synopsys Inc. and ARM Ltd. are working together on a SystemVerilog Verification Methodology Manual and hope to have it ready by June.
2002-07-03 Synopsys parlays Avanti purchase into mixed-signal tool set
Electronic design automation provider Synopsys Inc. is developing a mixed-signal tool set following its recent purchase of Avanti Corp.
2003-04-15 Synopsys executive predicts end of VHDL
Synopsys' chairman and CEO Aart de Geus predicted that VHDL will go away in 10 years. De Geus made his prediction at the Synopsys Developers Forum in Santa Clara, California.
2004-03-31 Synopsys CEO defends MoSys acquisition
Responding to user questions on a variety of topics, Aart de Geus, Synopsys CEO, defended his company's proposed acquisition of MoSys in a new E-Mail Synopsys User's Group (ESNUG) mailing.
2005-06-10 Synopsys adds PowerPC processors to DesignWare library
Synopsys Inc. has begun to offer synthesizable versions of the PowerPC 405 and 440 processors belonging to IBM Corp. as part of its DesignWare intellectual property library, Synopsys said
2005-10-27 Survey finds verification tool use largely unchanged from 2004
The 2005
2005-09-02 Survey finds use of ESL, FPGAs expected to increase
The design community is planning a significant increase in electronic system level (ESL) methodology adoption, according to the results of a recent survey conducted by Celoxica Inc. and Electronics Weekly.
2006-07-13 Summit Design launches IP interoperability initiative
Summit Design announced the launch of its Intellectual Property Initiative, which aims to address IP interoperability issues at the system level.
2005-09-01 Sub-$200 tools power 'farms' for verification
Stanley Hyduke sees a not-so-distant future for the semiconductor industry in which companies are running thousands of simultaneous simulations to cope with the verification bottleneck.
2004-12-13 STMicro keynoter sings praises of transaction level modeling
Philippe Magarshack, group vice president of central R&D at STMicroelectronics, made the 20km journey down the mountain from Crolles to provide a keynote presentation to the IP-SOC 2004 conference, which opened here today.
2004-01-01 Startups taking over ESL
It is very frequent that there a lot of new startup in ESL design, and ESL announcements from small, established EDA vendors.
2004-04-21 Startup's tool adds hardware validation
Carbon Design Systems has expanded the capabilities of its DesignPlayer models to perform hardware validation as well as presilicon software validation.
2004-01-01 Startup promises 'algorithm to tapeout'
Synfora's Pico product line will let users create C-language algorithms for blocks such as MPEG or MP3 decoders.
2005-06-06 Startup integrates equivalence checker with Mentor's Catapult
Calypto Design Systems Inc. said that it would work with Mentor Graphics Corp. to facilitate integration between Calypto's system-level equivalence checker (SLEC) and Mentor's Catapult C synthesis tool
2003-09-03 Startup eyes hard/software pre-silicon validation
A 15-person design automation startup staffed with verification veterans aims to make pre-silicon validation tools practical for the masses.
2005-01-21 Startup claims to optimize IC layouts for yield
Even the best chip layouts need some help to maximize IC yields, according to startup Nannor Technologies Inc., which is quietly preparing a layout optimization tool.
2002-06-12 Standards inch forward with skeptics in tow
Two standards efforts will take major steps forward at the 39th Design Automation Conference, as the OpenAccess Coalition announces four additional EDA vendor members and much of the EDA community lines up behind Accellera's new SystemVerilog standard.
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