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2009-02-13 What's in store for P1801 (Unified Power Format)?
A common industry standard for low power design and verification will satisfy what customers have needed all along
2007-06-18 The intricate dance of cutting power consumption
Key players in the industry are collaborating to deliver low-power solutions that bring more automated EDA tools, smarter IP, standard formats and more power-stingy processes together into true end-to-end solutions. EDA and IP companies have worked within the Accellera standards organization to develop the Unified Power Format (UPF).
2007-03-27 The dilemma of two languages in low-power design
EDA users may not like it, but when it comes to low-power design they will probably have to speak two languages: CPF and UPF
2006-09-21 Synopsys donates power management tech to Accellera
Synopsys has donated power management technology to Accellera, the EDA organization focused on electronic design automation standards
2009-07-28 Power to take center stage at DAC
Power, arguably today's No. 1 headache for designers, will be the theme of workshops, tutorials, meetings, presentations and technical tracks at the 46th Design Automation Conference (DAC
2009-03-19 Power management for optimal design
This article describes a holistic approach for managing and optimizing the power in a design. Effective power management involves proper understanding the application of a chip, technology selection, design techniques and methodology
2007-07-16 Multivoltage verification solution eases low-power design
MaVeric is a comprehensive multivoltage verification solution that hopes to ease designers' struggles with low-power designs that require the verification of multiple voltage "islands
2007-03-05 Magma tools cut clock tree power draw by 25
Magma Design Automation has introduced a pair of low-power IC implementation and analysis tools that the company claims have been shown to reduce power consumption in nanometer ICs by 25 percent
2009-03-24 IEEE okays low-power design spec
The IEEE has approved a new standard that provides portability for low-power design specifications that can be used throughout the electronic system design, analysis, verification and implementation flow
2007-03-23 Hope fades for IC power standards union
The hoped-for-convergence between two rival IC low-power specifications will not likely take place anytime soon
2007-05-01 Hope dims for power spec merger
Two rival specification formats for low-power IC design are now publicly available, and backers of both agree that it would be technically feasible to converge them into a single standard. But disagreements over how that convergence should take place threaten to block further progress
2012-08-08 Grasping power awareness in RTL design analysis
Find out how formats such as CPF and UPF play a key role in capturing power intent for RTL design analysis and verification
2014-02-13 Energy design through unified hardware abstraction
Learn how to achieve energy-efficient solutions through optimal alignment across the pre- and post-silicon phases of energy optimisation supported by unified design flows, abstractions and formats
2012-10-19 Employ hierarchical methods for power intent specification
Here's a guide to using a hierarchical low-power design methodology
2006-12-01 EDA vendor rivalry bogs single power spec
Amid calls for a single power spec throughout the design flow, EDA vendor rivalry continues to fuel two separate efforts to develop a low-power description standard
2012-04-30 Design for power methodology: From architectural plan to signoff
Here's a look at a holistic design for power methodology that spans from architectural decisions through front-end design to physical implementation and sign-off
2007-03-16 CPF-compliant tools aim for low power
Cadence Design Systems Inc. has added the Common Power Format to its existing logic design, verification and implementation tools
2006-10-06 Coalition seeks to unify IC power standards efforts
The Silicon Integration Initiative launched the Low Power Coalition which may help unite two disparate efforts for standardizing a power specification format
2007-02-01 Cadence deploys CPF in low-power design flow
Cadence Design Systems has added the Common Power Format (CPF) to its existing logic design, verification and implementation tools
2007-10-29 ATPG offers improved low power management
Synopsys has expanded the low power management capabilities in its Galaxy test solution reduce the time and effort needed to generate high-quality, power-aware manufacturing tests for ICs
2013-01-02 Apply formal methods to power-aware verification
Read about an apps approach for implementing formal methods to power-aware verification
2007-06-18 Advanced low-power modes stump IC designers
While EDA vendors are still fighting over two low-power formats, a larger problem may have been obscured: Low-power techniques are so difficult that a rethinking of the entire IC design flow may be needed
2006-10-13 Si2 to facilitate standardization of common power format
Cadence and the Silicon Integration Initiative have agreed on Si2 facilitating standardization of the Common Power Format through the IEEE
2007-01-25 Virage Logic joins Low Power Coalition
Virage Logic has joined Silicon Integration Initiative's Low Power Coalition, a unified effort that aims to create a common format for low-power design, implementation and verification.
2015-03-19 Unified platform for Internet of Things 'not needed
A number of standards operating under the helm of IoT are, for quite some time, finding increasing adoption not only on the consumer level, but also in large-scale government and industrial applications.
2013-01-25 Reduce power estimation time from weeks to hours
Find out how to automatically generate a chip design's gate-level waveform from the RTL design environment without having to bring up the gate-level environment.
2006-11-06 Cadence, Si2 team up for unified low-power standard
Cadence and Silicon Integration Initiative partnered to enable a common industry standard for low-power design, implementation and verificationthe Common Power Format
2007-04-02 Synopsys design platforms support UPF 1.0
Synopsys Inc. has announced a low-power design flow that will implement the Accellera Unified Power Format version 1.0 in its IC verification and implementation products in the second half of 2007.
2008-01-24 EDA trio offers UPF-based products
Magma Design Automation, Mentor Graphics and Synopsys are now delivering low-power EDA tools based on the Accellera-developed Unified Power Format standard, UPF 1.0.
2007-02-27 EDA 'troublemakers' debate at DVCon
Confronted with provocative questions, DVCon EDA vendor representatives debated topics such as low-power standards, Cadence Design Systems' Skill language, and outsourcing to India
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