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2012-03-09 Wide I/O driving 3-D with TSV
Find out how wide I/O is leading the way to through-silicon vias-based heterogeneous die stacks
2011-02-25 Vendors keen on pushing mobile DRAM to higher speeds
While 800- or 1,066MHz LPDDR2 devices could serve as a bridge to next-gen technologies, they could also push out other next-gen candidates.
2012-10-16 TSMC preps CoWoS test car with JEDEC Wide I/O DRAM Interface
The company's CoWoS technology provides the front-end manufacturing through chip on wafer bonding process before forming the final component.
2008-01-22 Elpida tips x64bit I/O Mobile RAM
Elpida Memory has released a new x64bit wide I/O 256Mbit Mobile RAM, the ECK2664JACN.
2011-04-21 Bandwidth concerns fuel mobile DRAM race
Staggering bandwidth requirements are forcing mobile DRAM vendors to shift to next-gen memory standards. Options abound, but many see wide I/O DRAM technology as the clear frontrunner.
2013-01-24 Imec, Cadence team up for DFT solution for 3D memory
Cadence's and imec's solution includes generation of DRAM test control signals in the logic die and inclusion of the DRAM boundary scan registers test access mechanisms of the 3D test architecture.
2012-02-06 TSMC to roll 3D IC assembly service next year
The company has one year to get all physical design kits and EDA support in place to allow customers to design with COWOS, the technology standing for chip on wafer on substrate.
2011-12-22 Sematech details 3D IC tech hurdles
Sematech has identified heterogeneous computing, memory, imaging, smart sensor systems, communication switches and power delivery/conditioning as some of the potential future killer applications
2011-10-11 Price challenges hinder TSV adoption
In order for chip stacks using high density through-silicon vias (TSVs) to be used in high volume devices, major price adjustments should be done.
2015-01-09 Identifying memory trends: Issues, standards and specs
Jennie Grosslight, the memory test product manager at Keysight Technologies, revealed what she thinks will be the prevailing memory trends in 2015.
2013-08-02 Imec, Cascade probe 25?m-diameter micro-bumps
The organisations revealed breakthroughs in probing stacked ICs (3D-SICs) on a wide I/O test wafer with its fully-automated CM300 probe solution using an advanced version of Pyramid Probe technology
2013-08-08 Cadence unveils VIP Models for latest memory standards
Cadence Design Systems latest verification IP (VIP) models support the LPDDR4, Wide I/O 2, eMMC 5.0, HMC and DDR4 LRDIMM standards
2012-02-03 Advances in 3D-IC testing
Read about the design-for-3D-test architecture and implementation flow developed by researchers at Industrial Technology Research Institute based on the Synopsys test solution.
2011-10-14 The move toward 3D chips
Semiconductor fabrication is moving toward 3D ICs and by next year, 3D chips will be available for commercialization.
2012-04-26 SEMICON panel highlights SEA's semiconductor opportunities
Experts highlight collaboration, R&D in cutting-edge technologies, and workforce development in Southeast Asia's semiconductor industries.
2011-02-24 Samsung chief cites challenges facing IC design
IC designers must address power consumption issues, the need for new transistor structure and memory types, delayed development of 3D TSV-based devices, and calls for circuit design breakthroughs.
2012-05-10 Microsoft joins memory consortium
Microsoft's participation signals the potential of the Memory Cube to drive changes in the traditional memory hierarchy and systems software for computers and networks.
2012-03-28 Micron advances with 3D chips
The company has laid down its plans with the Hybrid Memory Cube that is currently being backed by Altera, OpenSilicon, Samsung, Xilinx and IBM.
2002-06-11 ISSI rolls 64Mb SDRAM
Integrated Silicon Solution Inc. has introduced the IS42S32200A 64Mb SDRAM that operates at clock speeds of up to 200MHz.
2012-08-16 Initial draft of 3-D DRAM specs released to HMCC members
The Hybrid Memory Cube Consortium has release a draft of interface specifications for its 3-D DRAM memory stack.
2011-04-06 Industry pushes TSV-based 3D chips development
Amid fears that IC scaling is becoming too costly for chipmakers, the IC industry is working to develop TSV-based 3D chips, and stack and connect devices in a 3D configuration using TSVs.
2014-12-04 End of DDR marks surge of 3D, TSV-based memory
Several DRAM memory architectures based on 3D layer stacking and TSV have evolved to accommodate increasing memory requirements spearheaded by Samsung, Hynix and Micron.
2012-03-15 Electronics firms clamour for more collaboration
Executives of Cadence, TSMC and ARM are calling for other companies to step up their collaborations to deal with the growing complexity of technologies of semiconductor design.
2016-05-02 Data inspection techniques for massive memory designs
Learn about efficient data inspection techniques that will help you reduce the verification stint in a large storage high bandwidth DDR-based memory design.
2012-10-18 ARM's V8 to be used for TSMC's 16nm FinFET
Taiwanese foundry plans to use ARM's first 64bit processor, the V8, as a test vehicle for the 16nm FinFET process.
2012-03-09 Analyst reveals market trends for DRAM, NAND flash
DRAMeXchange put across six industry trends for DRAM and NAND flash industries from 2012-2015.
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