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What is Ultra SCSI?
Ultra SCSI is also called "Fast-20". It is an enhancement of SCSI that results in doubling the FAST SCSI data throughput speeds to 20MBps for 8bit and 40MBps for 16bit. It reduces the maximum allowable single-ended SCSI cable length to 1.5m for five to eight addresses and 3m for four or fewer addresses. Maximum allowable differential (HVD) SCSI cable length is 25m. It is defined in the SPI document of the SCSI-3 spec.
Source: Paralan Corp.
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2003-02-20 Altera enhances Nios processor memory, software
Altera Corp. has packed a new version of its Nios processor core with enhanced memory, debugging, and software capabilities.
2006-10-26 Altera eases FPGA design with $150 starter kit
Priced to attract a wide range of FPGA users, including designers with no previous FPGA experience, Altera's new low-cost FPGA starter kit features the industry's lowest cost Cyclone II FPGA device family.
2002-07-01 Altera DSP design tool supports Stratix devices
Altera Corp. has upgraded its DSP Builder design tool to provide support for the Stratix device family, as well as include an interface to the Quartus II design software's SignalTap embedded logic analyzer.
2006-05-24 Altera devices pass PCI-SIG compliance tests
Altera announced that its Stratix II GX FPGA, PCI Express x8 MegaCore IP core and Stratix II GX-based PCI Express Development Kit passed the PCI-SIG Compliance tests.
2007-12-11 Altera develops zero-power CPLDs for portables
Altera Corp. expands its low-power portfolio with the introduction of the MAX IIZ CPLD, which is designed specifically to address the power, package and price constraints of the portable applications market.
2004-09-06 Altera development kits target FPGAs, CPLDs
Altera has introduced development kits for its Stratix II FPGAs and Max II CPLDs.
2003-07-09 Altera development kit supports TI DSP platforms
Altera Corp. has released the Stratix Professional Edition of its DSP development kit that interfaces to TI's DSP development platforms.
2003-08-08 Altera development kit
The company has released the Nios Development Kit, Stratix Professional Edition that features what they claim is the largest FPGA available in a Nios Development Kit.
2002-05-09 Altera design software supports Linux 7.1
Altera Corp. has announced that its Quartus II v2.0 design software now supports Red Hat's Linux 7.1 OS, allowing PLD designers to use low cost Linux-based server farms to reduce development costs and design cycle times.
2002-02-12 Altera design software reduces compile times by 50 percent
Version 2.0 of the Quartus II SOPC design software is includes the LogiLock design flow that is claimed to improve performance in block-level design by 15 percent, and the fast-fit compile option that reduces compile times by 50 percent.
2006-05-19 Altera deploys Synopsys' Star-RCXT for 65nm designs
Synopsys announced that Altera has deployed Synopsys' Star-RCXT extraction tool and HSIM FastSpice simulator for its FPGA design flow targeting TSMC 65nm Nexsys process technology.
2013-08-01 Altera demos Interlaken IP core on OCTEON processors
The Altera Interlaken IP core is ideal for multi-terabit routers and switches for access, carrier Ethernet and data centre applications that demand IP configurability to optimise for various traffic profiles.
2005-05-02 Altera demonstrates FPGA for video-over-IP
The company has unveiled what it claims to be the industry's first FPGA-based, video-over-IP reference design.
2015-04-08 Altera delivers UBM-free WLCSP
Altera, together with TSMC, designed an ultra-thin, UBM-free wafer-level chip scale package for Altera's MAX 10 field programmable gate arrays.
2007-07-30 Altera delivers FPGA support for Ethernet apps
IP cores for Ethernet communications protocols used in industrial automation applications can now be implemented on Altera's low-cost Cyclone series FPGAs.
2013-04-25 Altera debuts Cyclone V SoC dev kit
Featuring the ARM Development Studio 5 Altera Edition toolkit software, the development platform claims to enable hardware and software developers to speed up embedded systems design development.
2005-09-16 Altera Cyclone II FPGAs offered in new packaging options
Altera introduced new packaging options for its Cyclone II FPGA family, providing designers of high-volume applications with even lower-cost programmable solutions and smaller form factors.
2010-12-09 Altera cuts power by 50% in MAX V CPLD
Altera claims its MAX V device family uses half the power compared to competing CPLDs while maintaining the instant-on, single-chip, non-volatile characteristics of the previous MAX series.
2003-12-22 Altera CPLDs power Pixart cellular phone cameras
2008-06-25 Altera CPLDs are Olymic-bound
Altera Corp.'s MAX II CPLDs are going to the Olympics. Shenzhen Huayu Communications Technology Co. Ltd selected MAX IIZ for use in its P1200 portable handsets at the summer Olympics for identification, logistics and public transportation services.
2006-05-29 Altera CPLD powers ZAPiT game console
Altera, ZAPiT Games and Nytric recently announced the choice of Altera's MAX II CPLDs to create an interactive entertainment product for family-oriented gaming.
2002-07-29 Altera CPLD packs 512 macrocells
The EPM3512A CPLD packs 512 macrocells making it suitable for users developing wide data bus applications.
2002-08-19 Altera CPLD packs 512 macrocells
The EPM3512A CPLD packs 512 macrocells and is aimed at customers developing CPLD applications such as decoder logic, I/O interfaces, and control path interfaces.
2005-06-30 Altera continues market share position in Japan
Programmable logic provider Altera Japan Ltd, a subsidiary of Altera Corp., is commemorating its 15th anniversary this week.
2005-10-20 Altera completes rollout of low-cost Cyclone II FPGAs
Programmable logic supplier Altera Corp. has completed the rollout of its low-cost Cyclone II field-programmable gate array (FPGA) family, the company said.
2003-09-15 Altera completes first-generation Cyclone device line
Altera Corp. has announced the availability of the EP1C4 device, the final member of its Cyclone FPGA family.
2003-10-10 Altera co-processor supports 3GPP HSDPA standard
Altera Corp. has introduced what it claims is the industry's most cost-effective turbo encoder co-processor for wireless data apps.
2008-05-20 Altera claims industry's first 40nm FPGAs, ASICs
Enabling designers to achieve new levels of integration and innovation, Altera introduces what it claims to be the industry's first 40nm FPGAs and HardCopy ASICs.
2005-07-01 Altera chief focuses on innovation
Finding a processor with the right mix of features, reducing product cost and achieving system performance are creating bottlenecks in leading-edge technologies.
2013-12-30 Altera CEO: Industry is looking up despite down 2014
John Daane, Altera's CEO, stated that Moore's Law will remain while the near term looks upbeat as a result of scaling that will continue for several generations, offsetting rising fab costs.
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