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2003-07-25	UMC, Barcelona to collaborate on analog synthesis solutions Semiconductor foundry United Microelectronics Corp. (UMC) and Barcelona Design Inc., a supplier of analog synthesis solutions, have agreed to jointly develop synthesizable PLL and ADC solutions targeted at UMC's process technologies, including 0.18? 0.15?m and 0.13 ?m.
2003-09-22	Toshiba licenses Barcelona analog synthesis solutions Toshiba Corp. has licensed Barcelona Design Inc.'s analog synthesis solutions for use on its 0.13?m and 90nm processes.
2004-03-16	Synthesis methods for ASIC, FPGA designs Design methodologies that employ cross-implementation EDA technology such as the MultiPoint provide the flexibility to implement a design in the best possible medium.
2003-10-13	Sandbridge adopts Barcelona analog solutions Sandbridge Technologies Inc. has licensed Barcelona Design Inc.'s analog synthesis solution for the creation of PLL circuits
2001-06-16	Analog, mixed-signal design flow found wanting Different views cloud the current analog/mixed-signal design flow issue and should stop concentrating on the problem but find a lasting solution for the industry to further prosper
2003-09-01	Analog/RF automation for consumer media products The biggest challenge for consumer media products is the design of low-power analog and RF interfaces and the integration of these interfaces with the embedded system
2002-11-18	SoC/IP designs need next-gen solutions for integration verification As the cost of SoC design plus time-to-wolume pressure continue to rise, a next-generation simulator for SoC integration verification is required to ensure functionality.
2009-11-11	Integrated solutions make analog filter design easy This article examines a filter implementation, first using a continuous-time filter and then with a switched-capacitor filter approach to show the differences in performance and complexity.
2004-01-06	Recasting IC design focus in 2004 Three primary areas of focus for 2004: consolidation of verification methodologies, development of solutions that combine design, manufacturing and test, and an increase in full-chip verification of mixed-signal SoCs
2003-10-09	Process tool promises yield optimization PDF Solutions Inc. is expanding into EDA with a tool that claims to improve designs for optimum yield during the physical-synthesis stage
2003-10-21	Panelists, keynoter cite EDA interoperability roadblocks Panelists explored EDA interoperability "hot buttons" at the Synopsys EDA Interoperability Developer's Forum held last October 16-17.
2008-07-30	National hails Synopsys as its key EDA partner Synopsys has announced that the company was chosen by National as its key EDA partner in product development.
2012-06-04	Globalfoundries to demo enhanced silicon-validated design flow According to the company, the flow provides proven and complete front-to-back support for advanced analog/mixed-signal (AMS) design using the industry's latest design automation technology
2002-10-02	FTD adopts Cadence design flow FTD Technology Pte Ltd has selected Cadence Design Systems Pte Ltd's front-to-back design and verification flow as its primary platform for digital, analog, mixed-signal, and RF IC design
2003-09-01	Fresh crop of EDA startups The semiconductor industry may still be reeling from the economic downturn, but new EDA companies with interesting ideas continue to emerge.
2002-09-25	Cadence qualifies as prime EDA vendor for AMS austriamicrosystems has qualified Cadence Design Systems Inc.'s analog/mixed-signal solutions as a reference flow
2012-06-01	ASTC, Tanner to partner in ASIC design John S. Zuk, vice president for marketing & business strategy at Tanner EDA, specified that ASTC teams will be utilizing the complete Tanner EDA tool suite.
2005-05-02	Limits of IP block strategy exposed Analog IP must be offered within the context of a broader solution that includes tools, services and lots of support
2002-09-16	Toshiba, Neolinear formulate new methodology for Soc design Toshiba and Neolinear teams up to implement a new AMS design methodology that enables significant analog design reuse
2003-12-01	Process tool promises yield optimization PDF Solutions is expanding into EDA with a tool that claims to improve designs for optimum yield during the physical-synthesis step in the digital IC design process
2010-12-13	AWR Corp. offers update to EDA software Update 2 for Microwave Office, Analog Office, Visual System Simulator (VSS) and AXIEM software solutions now available
2005-06-07	Three tout more nimble physical design Three tool vendors are pitching breakthroughs in IC physical design in advance of next week's Design Automation Conference
2007-02-28	Talks bring key industry issues to forefront for mainland EEs IIC-China will be offering mainland China engineers the chance to interact and discuss key issues with both major industry players and peers in the form of Summits and Vendor Seminars.
2008-07-01	Synopsys gears up for 'techonomic' challenges According to chairman and CEO of Synopsys Aart de Geus: There's a trade-off between innovation, execution and collaboration. You can execute, but if you don't collaborate with the right people, you have nothing.
2004-07-01	Speedy A/Ds demand stable clocks Understanding the factors that affect converter accuracy will establish just how good a reference clock must be.
2002-12-09	Researchers call for fundamental shift in timing analysis Calling for a new approach to the design of digital circuits, researchers at the ACM/IEEE Tau workshop presented strong arguments for a move to statistical, or "probabilistic," timing analysis.
2005-11-08	Panelists ponder challenges of 45nm The move to the 45nm process node will be costly and challenging, but worth it for selected applications, according to panelists at the EDA Tech Forum here Thursday (Nov. 3
2005-04-01	Is EDA's world too provincial? If EDA wants to come out of its current stagnation, it may be time to broaden the focus.
2005-04-12	Intel's Singer calls for 'platform-oriented' tools Calling on the EDA industry to broaden its scope, Intel executive Gadi Singer cited the need for tools that support complete "platforms," including multiple chips and software, in a keynote speech at the Electronic Design Processes (EDP).
2007-06-18	Industry tackles approach to DFM, DFY issues Experts from chip, EDA and foundry companies ask whether it's better to deal with DFM and DFY issues at tape-out or minister to the design starting at the register transfer level.