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What is an ASIC?
An application-specific integrated circuit (ASIC) is an IC that is customised for a specific application (end product or a closely related family of end products), such as a chip which is designed to run a cellular handset.
total search2194 articles
2013-12-12 Xilinx UltraScale FPGA boasts 50M equivalent ASIC gates
The company announced its 20nm portfolio of All Programmable UltraScale devices, along with documentation and Vivado Design Suite support.
2004-11-15 Xilinx to wrestle ASIC vendors with EasyPath revisions
Xilinx is intensifying its competition with ASIC vendors with the recent revisions in its EasyPath FPGA technology. EasyPath, according to Xilinx, is the industry's lowest cost and only conversion-free replacement to ASICs for volume production.
2013-09-24 Xilinx OTN solutions bridge gap between ASSP, ASIC
SmartCORE IP aims to deliver all programmable solutions needed to create intelligent 400G and Nx100G OTN solutions and OTN switching platforms with low latency, low jitter and high QoS requirements.
2013-03-06 Xilinx fills ASIC, ASSP gaps for data centres
Incorporating both SmartCORE IP and ARM processor-based smarts with All Programmable devices, the IP targets networks for LTE and LTE Advanced wireless HetNets, and 400G and Nx100G OTN.
2004-05-14 Xelerated offers ICs, software extensions as 'virtual ASIC'
Xelerated is offering a series of co-processor chips and software extensions to Broadcom's StrataXGS architecture.
2008-03-19 Virtex-5 evaluation platform targets ASIC prototyping
Tokyo Electron Device Ltd (TED) has announced the inrevium TB-5V-LX330-EX evaluation platform for ASIC prototyping with the Xilinx Virtex-5 FPGA LX330.
2004-03-18 Virage to power Kawasaki's ASIC initiative
Kawasaki Microelectronics has partnered with Virage Logic Corp. in developing its Matrix ASIC strategic initiative.
2003-07-02 ViewAhead embedded SoC solution based on ASIC platform
Designed for OEM manufacturers, the ViewFleX500 embedded SoC solution from ViewAhead Technology reduces development costs and time-to-market for imaging devices.
2003-07-16 Vicor chip meets DSP, ASIC requirements
Vicor Corp. has introduced its first VI Chip Voltage Transformation Module called the V048K015T80.
2006-07-07 ViASIC announces 2-mask standard-metal Structured ASIC fabric
To address the requirements of the reconfigurable SoC market, ViASIC have introduced a new Structured ASIC fabric called DuoMask.
2002-03-11 Verification tool enables rapid ASIC prototyping
Designed for creating ASIC and SoC prototypes using off-the-shelf FPGAs, the SpeedGate Direct System Verification environment addresses all hardware prototype creation and verification challenges.
2004-05-13 Using your wireless ASIC-AN18
This app note shows that the P35-47-series of wireless ASICs are grouped into two families, the highly integrated transceiver ASICs and the amplifier/switch ASICs.
2005-06-01 Using the ADSP-BF561 Blackfin processor as a TFT-LCD controller eliminates need for timing ASIC
This app note describes the hardware and software requirements necessary to develop a video application that simultaneously streams data to the ADSP-BF561 Blackfin processor and displays it on a LCD panel with a RGB interface.
2003-12-16 Using ISSP technology in structured ASIC design
NEC's ISSP technology for designing structured ASIC has become popular with design engineers because of its easy-to-use design flow and clear road map for 90nm.
2000-08-31 Translation of existing ASIC designs
This application note describes the types of data required from the ASIC user and the process steps followed by Atmel to successfully translate an existing ASIC design, and presents the results of two translation efforts.
2010-01-22 Transceiver eases ASIC-compliant base station implementation
Maxim Integrated Products has developed the MAX9947 transceiver that provides an autodirection output to facilitate RS-485 bus arbitration in tower-mounted equipment without requiring a microcontroller.
2004-12-21 Toshiba supports Cadence RTL compiler for ASIC design
Cadence Design Systems Inc. announced that Toshiba America Electronic Components Inc. (TAEC) has introduced a design kit to support its custom System-on-Chip (SoC) and ASIC customers using Cadence Encounter RTL compiler synthesis.
2007-01-10 Tool claims breakthrough in ASIC debugging
Claiming a breakthrough in ASIC debugging, Synplicity will release details about TotalRecall, which it says will bring full debug visibility to FPGA prototypes used for ASIC verification.
2007-06-06 Tool allows full visibility into FPGA-based ASIC prototyping
Synplicity Inc. has released Identify Pro ASIC and ASSP verification software, which features the TotalRecall technology to provide designers with full visibility into FPGA-based ASIC and ASSP prototypes.
2007-09-03 Tips for successful structured ASIC designs
The use of structured ASIC for custom IC design is an increasingly attractive option. This article provides useful tips for structured ASIC designs.
2000-02-11 Timing-Driven Flow (TDF) SLI ASIC design flow with commercial EDA tools
The Timing-Driven Flow (TDF) is the first state-of-the-art design methodology based on open EDA tools and standards to successfully address the challenge of deep sub-micron timing convergence. Without TDF it is not uncommon for a high-gate-count, high-complexity design with tight timing specifications to go through 10-20 iterations between synthesis and layout and still fail to meet timing. This application note describes the function of the TDF in an ASIC application.
2005-08-16 Timing analyzer puts ASIC-like functionality in FPGAs
Actel Corp. rolls out a static timing analysis engine that brings ASIC functionality into the FPGA world.
2006-02-27 TI upgrades Pyramid ASIC design kit
Texas Instruments announced the release of version 5 of the Pyramid ASIC design kit, targeting telecommunications, consumer and wireless infrastructure markets.
2002-10-04 TI India develops ASIC cell design methodology
Engineers at Texas Instruments India have developed a new specification method for driving cell design flow, overcoming the current lack of a set process for specification capture in ASIC cell design methodology.
2004-04-13 TI adds 6.25Gb serdes blocks to ASIC library
Texas Instruments' ASIC business unit has added 6.25Gbps serializer/deserializer interfaces to its 90nm process library.
2011-10-05 The myth of the $100M ASIC
The notion that leading-edge chips require $100 million to develop has severely decimated levels of venture capital investments in semiconductors, thus diminishing innovation in the industry and the economy.
2000-12-01 The advantage of using logic BIST for ASIC designs
This technical paper reveals the advantage of using logic BIST for ASIC designs.
2003-04-08 Tera Systems technology enhances IBM ASIC design flow
Tera Systems Inc. has announced that TeraForm RTL Silicon Virtual Prototype (SVP) has been integrated into the IBM Blue Logic MidRange ASIC design flow.
2004-03-16 Synthesis methods for ASIC, FPGA designs
Design methodologies that employ cross-implementation EDA technology such as the MultiPoint provide the flexibility to implement a design in the best possible medium.
2005-07-01 Synplicity software optimized for Fujitsu's AccelArray ASIC devices
Fujitsu Ltd, Fujitsu Microelectronics America Inc. (FMA) and Synplicity Inc. announced Synplicity's new Amplify AccelArray Pro software, a physical synthesis solution optimized for Fujitsu's AccelArray structured ASIC devices.
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