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2007-02-01 View from assertion-level logic
The purpose of a circuit diagram is to convey the maximum amount of information in the most efficient fashion. One aspect of this is that the signals carried by the wires may be active-high or active-low.
2002-03-13 Vendors join push for assertion standards
The strongest effort yet to forge a standard assertion language for IC verification will unfold at the International HDL Conference this week, as Co-Design Automation and Real Intent announce the donation of the Superlog Design Assertion Subset to the Accellera standards body.
2005-06-16 SystemVerilog enhances assertion-based verification
ABV leverages designer knowledge and automatic verification methods to stress-test the design before tape-out. Find out how
2005-03-28 Renesas integrates Mentor's 0-In for assertion based verification flow
Renesas Technology Corp. has completed the integration of Mentor Graphics Corp.'s 0-In assertion synthesis technology and assertion-based verification flows with Renesas' LogicBench rapid prototyping system.
2011-11-03 Perform assertion-based verification in mixed-signal design
Understand how assertion-based verification can address the challenges in analog/mixed-signal verification.
2003-03-03 Novas adds assertion support to debugger
Novas Software Inc. has added OpenVera assertion support to its new Verdi Behavior-Based Debug System.
2003-05-26 New EDA consortium promotes assertion language
Seeking to accelerate the adoption of the PSL, 13 EDA companies have joined together with two user companies to form the PSL/Sugar Consortium.
2004-12-01 Methodology sought for assertion-based verification
Silicon IP providers and creators seek guidelines on how to use assertions effectively, aside from the standard protocols.
2002-11-21 IBM offers free trial of assertion-based verification tool
IBM's Haifa Research Laboratory has started to offer the company's FoCs assertion-based verification tool for a free 90-day trial.
2003-12-09 EDA startup pioneers assertion-based synthesis
Startup Bluespec Inc. will preview an "assertion-based" synthesis technology next week that it describes as a new approach to chip design.
2004-10-22 Cadence to add assertion library to platform
Cadence said it will add new assertion-based verification functionality and a new ABV library to its Incisive verification platform's Unified Simulator.
2004-10-21 Cadence to add assertion library to platform
Cadence Design Systems Inc. said it will add new assertion-based verification (ABV) functionality and a new ABV library to its Incisive verification platform's Unified Simulator.
2002-08-21 Axis adds assertion checking to emulation/acceleration
Axis Systems Inc. has devised a way to run assertions efficiently on its hardware platforms and thereby speed up assertion checking and, ultimately, the overall verification process.
2003-03-25 Averant enhances proprietary assertion language
With the new Solidify formal verification tool, Averant Inc. claims to have significantly enhanced its HPL property specification language.
2002-12-02 Assertion-based approach saves time
Functional verification may determine which companies will dominate and design-for-verification and ABV improve the efficiency and effectiveness of functional verification.
2002-01-16 Assertion methodologies for Verilog design
This article describes the different approaches designers need to undertake in dealing with assertion methodologies for hardware designs expressed in Verilog or VHDL.
2004-01-01 Assertion flow debuts
The Assertion Studio allows users to mix and match assertions if needed to add verification IP to their designs.
2003-01-31 0-In pumps up assertion-based verification suite
Armed with two new products and new technology, 0-In Design Automation is rolling out version 2.0 of its assertion-based verification suite.
2003-08-28 0-In Design obtains patent in assertion-based verification
Today 0-In Design Automation, an assertion-based verification company, has been granted U.S. patent no. 6,609,229, entitled ?Method for automatically generating checkers for finding functional defects in a description of a circuit?.
2004-01-01 0-In assertion compiler is multilingual
0-In Design Automation announced a compiler that reads assertions in multiple formats and outputs synthesizable Verilog.
2003-11-13 0-In assertion compiler has multilingual features
The company will announce an enhanced assertion compiler for its Assertion-Based Verification (ABV) tool suite.
2007-07-16 Verify designs with assertions
When adopting components of assertion-based verification (ABV) into standard production flows, teams run into several challenges. This article gives tips and tricks when dealing with ABV.
2003-06-05 TransEDA debuts property verification tool
TransEDA has announced a property and assertion capture and validation tool at the 2003 Design Automation Conference.
2006-10-16 Transaction assertions boost Jeda NSCa suite
Jeda Technologies is adding transaction-level assertion to native SystemC assertion (NSCa), a verification automation tool suite introduced in February.
2006-04-03 SystemC assertions go 'native'
Jeda Technologies shelved its own Jeda verification language in favor of a new tool suite supposedly equipped with the industry's first 'native' SystemC assertion-based verification automation capability.
2011-05-19 Synthesis tool improves functional coverage
NextOp has introduced its BugScope Assertion Synthesis that automatically generates high quality assertions and functional coverage properties in Verilog formats.
2003-03-03 Synopsys upgrades VCS and Vera
The company has announced upgrades to its VCS 7.0 Verilog simulator and Vera testbench automation tool.
2006-09-01 Plan-to-closure overcomes challenges
Learn how to reduce immediate and long-term risks, and improve the productivity, predictability and quality of your verification projects.
2007-09-17 Optimal use of assertions in verification
Assertions provide an efficient way of improving overall design cycle productivity by cutting verification time. Here are some tips in the optimal use of assertions in verification.
2011-05-05 NextOp, Nvidia ink license deal for BugScope
NextOp Software and Nvidia have signed a multilicense agreement for the expanded use of the BugScope assertion synthesis product.
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