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What does asynchronous mean?
In an asynchronous circuit, parts are largely autonomous. They are not governed by any regular, periodic time-controlling mechanism, such as a clock circuit or signal, but instead need only wait for the signals that indicate completion of instructions and operations. These signals are often specified by simple data transfer protocols.
This digital logic design is contrasted with a synchronous circuit which operates according to clock timing signals.
total search580 articles
2007-04-02 Efficient 8X oversampling asynchronous serial data recovery using IDELAY
Xilinx Virtex-4 and Virtex-5 devices a have high-precision programmable delay element associated with every input pin. These delay elements, called IDELAY, can be used to implement an oversampler that uses very few FPGA logic resources and, more importantly, just a single DCM and two global clock resources to do 8X oversampling. This solution provides better jitter tolerance than techniques that use multiple DCMs.
2000-11-30 Designing a multi-phase asynchronous buck regulator using the LM2639
This application note shows some design guidelines for an asynchronous buck regulator using the LM2639 to achieve multi-phase and ultra-high switching frequency.
2004-06-21 Design considerations for CAN Bus and asynchronous serial
This app note shows design considerations for CAN Bus and asynchronous serial.
2012-07-05 Data transfer rate tolerance in clock asynchronous serial I/O mode
Know the tolerance of data transfer rate in clock asynchronous serial I/O mode for several Renesas MCUs.
2002-08-06 Cypress samples fastest 16Mb asynchronous SRAMs
Cypress Semiconductor Corp. has begun sampling its 16Mb asynchronous SRAMs manufactured using the company's 0.155m RAM7 process technology, enabling speed of up to 8ns.
2009-04-20 Cypress rolls low-power, fast asynchronous SRAMs
Cypress Semiconductor Corp. has added three new devices in its SRAM portfolio: The 64Mbit MoBL (More Battery Life) SRAM, claimed to be dot be the highest-density low-power SRAM and the 3- and 6Mbit fast asynchronous SRAMs for wireless and networking applications.
2014-05-19 Cypress debuts asynchronous SRAMs with on-chip ECC
The Cypress 16Mb asynchronous SRAMs ensure data reliability in a variety of industrial, military, communication, data processing, medical, consumer and automotive applications.
2015-04-23 Cypress 4Mb asynchronous SRAMs promise data reliability
The SRAMs simplify designs and cut board space while ensuring data reliability in various industrial, military, data processing, medical, consumer and car applications, without the need for extra error correction chips.
2011-03-11 Configuring asynchronous mode using SCIF and DMA controller
Here's an example to transmit or receive data using the Serial Communication Interface with FIFO (SCIF) asynchronous mode.
2003-04-04 Chip designers debate asynchronous resets
Chip designers are divided when it comes to choosing synchronous or asynchronous resets, according to postings in the latest E-Mail Synopsys Users Group 409 bulletin.
2000-08-31 AVR134: Real-time clock (RTC) using the asynchronous timer
This application note describes how to implement a real-time clock (RTC) on AVR microcontrollers that features the RTC module.
2003-04-04 AVR134: Real Time Clock (RTC) using the Asynchronous Timer
This application note describes how to implement a Real Time Clock (RTC) on AVR microcontrollers that feature the RTC module.
2009-06-23 Asynchronous synthesis tool uses standard languages
Tiempo AS will demonstrate what it touts as the first synthesis tool for asynchronous logic that operates from standard design languages at the Design Automation Conference.
2007-03-01 Asynchronous interconnects need innovative tools
Today's EDA tools lack the ability to describe the more complex constraints used by self-timed circuits. Instead, they remain slanted toward the simpler, synchronous circuits commonly used today.
2006-01-18 Asynchronous EDA tools coming in Q2, says Silistix
Silistix, a spin-out company from an asynchronous logic research group at the University of Manchester in England, has announced further details of its asynchronous interconnect design tools.
2003-03-10 Asynchronous design demonstrated at 130nm
Fulcrum Microsystems has reported successful characterization of a 130nm test chip carrying its fully asynchronous Nexus crossbar switch block.
2007-04-02 38D2 group: Serial I/O 1, 2 (asynchronous serial I/O (UART) mode)
The following article introduces and shows an example of how to use the Serial I/O 1, 2 (clock asynchronous serial I/O (UART) mode) on the 38D2 group device.
2003-05-16 Vector control of AC motors using low-cost MCUs
Vector control of AC motors is a computationally intensive process that requires a high-performance processor with associated peripherals.
2005-06-16 Using the EUSART on the PIC16F688
This app note will explain how to use the enhanced universal asynchronous receiver transmitter (EUSART) in Asynchronous (full-duplex) mode, capable of auto-wake-up on character reception and auto-baud calibration.
2006-02-01 Using ATM chipset in DSL architectures
Learn the different traffic-management functions of DSL architectures for high-speed Internet access.
2003-05-27 Using a UART to implement a 1-Wire Bus Master
This application note describes the required electrical interface, configuration, and timing relationship between Universal Asynchronous Receiver Transmitter (UART) and 1-Wire signals.
2005-01-17 USB-based data acquisition devices come of age
The widespread adoption of USB has proven useful for many applications, including measurement and automation.
2004-04-16 Tight DSP and NP integration produces enhanced VoIP chip solutions
This technical paper discusses how VoIP has altered the landscape of telecommunications by adding a new level of intelligence to networks.
2004-11-16 Taking GALS to 65nm designs
Emerging globally asynchronous, locally synchronous SoC design architectures offer a powerful way to solve interconnect issues in these superintegrated chips.
2002-10-29 STMicro transceiver offers 3.6V-tolerant I/Os
The company's 74ALVCH16245 16-bit CMOS transceiver features 3.6V-tolerant I/Os and offers a maximum propagation delay of 3ns.
2001-03-28 State machine design considerations and methodologies
This application note describes the various options encountered during the state machine design cycle.
2006-02-10 SRAM delivers 8ns access times
ISSI introduced a 2M x 8, 16Mb, high speed Asynchronous SRAM with access times as fast as 8ns, giving designers a high speed device that utilizes low power technology to minimize power consumption.
2004-01-01 Speeding up FPGA clock schemes
One of the most important steps in the design process is to identify how many different clocks to use and how to route them.
2005-02-10 Seiko Epson tips flexible processor via TFT technology
At the International Solid-State Circuits Conference (ISSCC) here, Japan's Seiko Epson Corp. presented a paper on a flexible, 8bit asynchronous microprocessor, based on a low-temperature, poly-silicon TFT technology.
2002-05-22 SBS CPCI card transmits voice, data over ATM
The VoABlade 6U CompactPCI interface card from SBS Technologies Inc. is capable of sending and receiving 2,048 simultaneous voice and data virtual circuits over a single fiber-optic connection at speeds up to 155Mbps.
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