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2011-05-16 Springsoft software adds advanced verification tech
Springsoft has integrated an advanced technology platform to its Certitude Functional Qualification System that will enable broader deployment of verification qualification methodologies
2006-12-18 Perform full-chip verification for AMS ICs
Simulation during the design phase can be efficiently done using a top-down design methodology.
2004-02-16 Mentor Graphics reinforces verification platform scalability
Mentor Graphics has released its ADMS v4.0 with added language support for mixed-signal functional verification
2003-03-10 Ikanos selects Tharas tool for chip verification flow
Broadband access vendor Ikanos Communications Inc. has incorporated Tharas Systems Inc.'s Hammer into its functional verification flow
2003-06-29 I/O system and chip verification in PCI and PCI-X systems
This application note discusses the importance of I/O system and chip verification in PCI and PCI-X systems.
2002-05-01 Full-chip verification for building nanometer memories
Verification tools can greatly facilitate memory design, where designers face a combination of evolving circuit complexity and increasing size in dealing with massive memory arrays
2003-02-03 Delivering a full-chip hierarchical circuit simulation
Since many nanometer problems are related to the dynamic circuit reponse, detailed full-chip circuit simulation should become the most effective way to resolve problems in SoC, memory and mixed-signal designs
2007-08-06 Cadence, SMIC team on RF chip design
Cadence and SMIC have collaborated to develop an RF design solution and announced the availability of SMIC RFCMOS 180nm PDK that supports the Cadence RF Design Methodology Kit.
2014-01-15 Cadence unveils Incisive 13.2 for SoC verification
The Incisive 13.2 platform from Cadence Design Systems offers features two new engines and additional automation features to speed SoC verification closure
2010-02-19 Address car hardware, software issues through verification
Many problems occur when hardware meets software, especially in automotive applications. This is where advanced, functional verification methodologies from the hardware world can be very useful
2007-08-17 Xilinx teams with EDA giants on 65nm FPGA verification
Xilinx has announced a collaboration with three major EDA companies to address the challenges of 65nm ultrahigh-capacity FPGA design verification
2007-08-02 Winbond adopts Cadence emulator to ease verification
Cadence Design Systems announced that Winbond Israel has adopted the Cadence Incisive Palladium emulator system for its advanced system-level verification needs
2013-07-22 Virtual design, verification for e-Mobility
Learn how to address many of the emerging engineering challenges that carmakers now face.
2003-12-01 Verisity plans manager for verification
To build its franchise beyond testbench generation tools, Verisity Ltd is developing what it calls an "intelligent testbench."
2004-06-09 Verisity eyes 10x verification boost with VPA
Verisity hopes to address the growing complexity in IC development with a series of applications for both engineering-level and project-level problems.
2015-04-27 Verilog-AMS vs SPICE view for SoC verification
In this article, we comparatively analyse the usage of Verilog/Verilog-AMS and SPICE views from the perspective of data converters and clocking IPs in an SoC.
2015-05-11 Verilog-AMS vs SPICE view for DDR, LCD verification
In this instalment, we comparatively analyse the usage of both views from the perspective of DDR interfaces, LCD controllers and on-chip memories
2005-06-15 Verify 1.5Gbps, 3Gbps gen of SATA standard at block, chip level
Synopsys announced the addition of Serial ATA verification intellectual property to its DesignWare Library
2003-09-24 Verification, test providers form outsourcing body
Six providers of services and tools for IC verification and test have banded together to form Expert Services and Tools for Semiconductors (ESTS
2007-12-18 Verification tool speeds up RFIC designs
Agilent Technologies has developed the GoldenGate Plus for RFIC simulation, analysis and verification
2002-02-01 Verification tool speeds complex IC out the door weeks ahead of schedule
This technical article discusses speeding up design and verification of complex ICs without sacrificing quality to beat competition
2009-01-21 Verification tool provides step-by-step approach
OneSpin Solutions has amended its software and packaged it in a way that supports a step-by-step approach for beginners.
2011-04-21 Verification tool offers advanced analysis, debug
Synopsys, Inc. has introduced the CustomExplorer Ultra mixed-signal verification environment that offers a comprehensive regression analysis
2002-03-11 Verification tool enables rapid ASIC prototyping
Designed for creating ASIC and SoC prototypes using off-the-shelf FPGAs, the SpeedGate Direct System Verification environment addresses all hardware prototype creation and verification challenges
2004-01-01 Verification platform for Jeda language rolls
Jeda Technologies released Jeda-X, a commercial product based on the Jeda hardware verification language
2007-08-29 Verification kit supports advanced techniques
Cadence Design Systems' new verification kit for SoC designs that aims to enable engineers to adopt advanced verification techniques with reduced risk and deployment effort
2007-01-31 Verification box exceeds 200MHz speeds
Gidel Ltd's Proc_SoC verification box claims to exceed verification speeds of 200MHz, thanks to a direct FPGA-to-FPGA interconnect scheme
2008-06-02 Use system models for better verification
This article describes the system-level to RTL design and verification flow of a commercial graphics processing chip. In this flow, system models were developed to validate the arithmetic computation of video instructions and were then used to verify the RTL implementation using sequential logic equivalence checking.
2003-08-01 Unifying ESL, verification
Richard Goering says that the industry would need ESL and SystemC. But design for verification, with SystemVerilog, is the most obvious next step for most of today's RTL chip designers.
2002-08-26 TransEDA offers PCI-X 2.0 verification IP
TransEDA PLC has put together a new verification bundle for designers wishing to create SoCs compliant with the PCI-X 2.0 standard
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