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2006-04-17 IC design flow integrated
Synopsys offers its customers the Pilot Design Environment, an integrated RTL-to-GDSII design system tailored to each customer's design infrastructure
2004-02-26 IBM, Tera claim RTL handoff flow
Tera Systems and IBM Microelectronics have begun offering what they call the first production-ready RTL handoff flow
2004-06-14 IBM announces ASIC timing flow, Cisco chips
IBM introduced a "variation-aware&quot IC timing flow targeted at ASICs in 130nm, 90nm and 65nm design nodes.
2006-10-18 Hua Hong NEC, Synopsys team up for reference design
Synopsys and Hua Hong NEC announced their jointly developed Reference Design Flow 2.0 for Hua Hong NEC's 0.18?m process.
2007-08-01 How to share IP in PCB design
This article discusses the disconnect between the digital design engineer's vision of bus structures on the PCB, and the failure of tools to capture and route this vision efficiently
2006-04-06 Hisilicon adopts Synopsys' Galaxy design platform
Synopsys announced that Hisilicon Technologies has adopted Synopsys' Galaxy Design Platform as its primary IC design flow for 130nm designs.
2010-05-10 HiPer design suite packs improved signal analysis
Tanner EDA is offering the version 15 of its HiPer Silicon full-flow design suite that includes new database for simulation data, waveform viewer and enhanced signal analysis platform.
2012-06-04 Globalfoundries to demo enhanced silicon-validated design flow
According to the company, the flow provides proven and complete front-to-back support for advanced analog/mixed-signal (AMS) design using the industry's latest design automation technology.
2006-06-01 Give PCB computer-aided design its due
PCB CAD gets no respect. With about 12 percent of overall EDA industry revenue, it is marked by sluggish growth, little or no startup activity and few announcements of new technology.
2006-04-07 GDA qualifies as ARM Approved Design Center
GDA Technologies, a supplier of Intellectual Property and electronic design services, announced that it has joined the ARM Approved Design Center Program
2002-08-21 Fulcrum IC heats asynchronous design debate
A coolly tantalizing alternative to the latest approaches to blazing IC performance is expected to cut this week's sweltering heat at the Hot Chips conference.
2009-01-20 Fujitsu intros 65nm mobile WiMAX design
Fujitsu Microelectronics Ltd has taped out a 65nm mobile WiMAX design using Fujitsu Reference Design Flow 3.0, which includes Common Power Format (CPF) enabled Cadence Low-Power technologies.
2002-10-02 FTD adopts Cadence design flow
FTD Technology Pte Ltd has selected Cadence Design Systems Pte Ltd's front-to-back design and verification flow as its primary platform for digital, analog, mixed-signal, and RF IC design.
2007-03-05 Freescale reduces EDA tool flow
Freescale reported significant design efficiency improvements and a sizeable reduction in the number of EDA "tool flows" the company supports in its global development and design activities
2005-11-14 Freescale design VP: OpenAccess simplifies chip makers' lives
The promise of OpenAccess is that it will provide EDA users with the best of both worlds, allowing chip makers to employ a hybrid flow of 'best of breed' tools from multiple vendors without huge integration challenges, according to Chekib Akrout, vice president of design technology at Freescale Semiconductor Inc.
2010-09-23 FPGA design tool debugs TMR, ensures safety
GateRocket and Mentor Graphics have collaborated on a verification-through-synthesis flow solution for advanced FPGA design that targets developers of FPGAs for safety-critical applications in military and aerospace markets.
2010-05-06 FPGA design suite includes intelligent clock gating
Xilinx has launched a new version of its ISE Design Suite to support its Virtex-6 and Spartan-6 FPGA that include intelligent clock gating technology and timing-driven design preservation
2010-11-10 FPGA design software updated
Lattice Diamond 1.1 extends support to MachXO and MachXO2 product families
2001-03-01 Flow is shaky for programmable SoCs
Programmable SoC designs are becoming the trend of the future thanks to the greater density of today's programmable devices and the availability of efficient microprocessors. Unfortunately the CAD flows for these devices are far from being robust.
2007-09-24 Firms collaborate to address 65nm FPGA design verification
Xilinx Inc. and a group of EDA companies teamed up to define and implement new verification flows to address ultrahigh-density designs of 65nm FPGAs and new emerging FPGA architectures.
2008-10-16 File translation flies via high-frequency PCB co-design
AWR and Mentor Graphics Corp. introduce the AWR Connected for Mentor Graphics.
2007-07-24 Faraday design flow taps Sequence power tool
Faraday has included Sequence's power analysis tool to its PowerSmart ultralow-power ASIC design flow.
2000-11-01 Extraction critical for RF design
Current CMOS technology is a viable candidate for portable communications devices. Modern deep-submicron MOS transistors have more than enough speed to handle high-frequency or RF signals.
2007-09-03 Extend DSP design to heterogeneous hardware platforms
Heterogeneous, reconfigurable DSP platforms supported by a platform-based design methodology allow traditional DSP designers to quickly evaluate the benefits that an FPGA coprocessor can bring to their unique applications
2009-09-22 Execs weigh in on SoC design challenges
The ASIC versus FPGA debate took an interesting turn, as executives from two design tool firms offered dueling keynote address on the virtues of and challenges facing FPGA-based and ASIC-based SoCs designs
2015-09-22 Examining the most underrated FPGA design tool ever
There is a design tool that is being quietly adopted by FPGA engineers because, in many cases, it produces results that are better than hand-coded counterparts
2013-08-23 Evaluating your design's high-speed interconnects
Here's a look at hybrid EM simulation for designing and modelling connectors for multi-gigabit applications.
2008-09-18 ESL EDA platform slashes design time in half
From Agilent comes the SystemVue 2008, a new EDA platform for electronic system-level design
2006-03-16 ESL design tools come up short
ESL and DFM tools need to pack far more capabilities than they do today if they are to represent the EDA industry's best opportunities for growth.
2005-06-15 Epson to design image processing SoCs using Forte's Cynthesizer
Seiko Epson Corp. (Epson) has chosen Forte Design Systems Cynthesizer behavioral synthesis product to design its next-generation image processing applications
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