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2008-08-18 DDR IP solutions speed up SoC design operation
Synopsys has introduced a full range of silicon- proven DesignWare DDR IP solutions for SoCs that need an interface to high-performance DDR3, DDR2 and DDR memory subsystems.
2005-04-18 DATE minds offer an array of fixes for SoC design
Designing high-performance SoCs needs a breakthrough from system-level design through manufacturing, according to DATE
2006-03-24 Cypress streamlines on Synopsys' Galaxy Design Platform
Synopsys announced that Cypress has signed a multiyear agreement to consolidate its digital IC design flows and methodologies using Synopsys' Galaxy Design Platform
2009-01-15 Cyclone III design guidelines
This design guideline summarizes not only the various aspects of the Cyclone III device, but also the Quartus II software features that you should look into when designing with the Cyclone III devices
1999-12-22 CPLD schematic design guide
This CPLD Schematic Design Guide provides information on using the CPLD fitter and supported CAE interfaces to create designs for Xilinx CPLD devices
2002-04-10 CoWare links system-level tool to Xilinx flow
Xilinx Inc. and CoWare Inc. are tailoring Co-Ware's N2C system-level design tool to create a design flow for Xilinx's newly announced Virtex-II systems-on-programmable-chips.
2002-05-01 COT design flow validates SoCs
This technical article details the approach two chip companies used to validate a COT (customer-owned tool) flow from beginning to end resulting in a complete working silicon
2001-08-09 Contactless smartcard design using the EM simulation software
This conference technical paper discusses the core technology of HF in contactless smartcard system, as well as the optimetrics analysis and design flow using an EM simulation software.
2003-06-02 Combine hardware and software design in programmable SoC
SCSD is a methodology converging hardware and software techniques, providing a cohesive path from system specification and functional algorithm identification to system implementation.
2005-04-01 Cobra strikes to reshape IC design flow
Magma Design rolls out its restructured Cobra technology that promises to reshape the nanometer-IC design flow process.
2002-09-16 Co-design method enables speech recognition SoC
Two STMicroelectronics design engineers use a system-level design flow based on the CoWare N2C method to create a speech-recognition capable SoC.
2006-07-12 Clock implementation tool supports 65nm design flows
Azuro said version 3 of the PowerCentric clock implementation solution provides 15 percent to 25 percent power reduction to support advanced variability-aware design flows at 65nm and below
2004-02-02 Choosing the right design flow model with integrated architecture
Users of ASIC, COT and COPD models are finding that flows based on an integrated RTL-to-GDSII system can offer additional benefits when fully leveraged.
2004-02-02 Chip-building tool supports Cadence flow
ReShape said its PD Builder chip construction tool now supports the ASIC/SoC design flow of Cadence
2005-06-13 Celoxica ESL design suite upgrade expands speed, size limits
Celoxica's DK Design Suite introduces VHDL and Verilog optimizations that work with Design Compiler from Synopsys Inc
2008-04-14 Capturing and sharing IP in PCB design
This article discusses the disconnect between the digital design engineer's vision of bus structures on the PCB and the failure of tools to capture and route this vision in an efficient manner
2014-12-04 Calypto intros high-level synthesis tech to speed up design
The Catapult 8 with the configurable hierarchical design architecture is built on a completely revised architecture that expedites design and verification closure, pushing widespread adoption of HLS
2011-08-31 Calypto acquires Catapult C for better integrated ESL flow
Aiming to get all as many pieces of an integrated ESL design flow together, Calypto said it has acquired, in a yet undisclosed terms, Catapult C Synthesis from Mentor.
2005-03-09 Cadence, X-Fab to build design kits for analog, mixed-signal ICs
FAB Semiconductor Foundries AG has signed a collaborative agreement with Cadence Design Systems Inc. X-FAB will work closely with Cadence to build and deliver comprehensive design kits for analog and mixed-signal ICs targeting mainstream and advanced process technologies
2005-10-10 Cadence, UMC develop reference design for wireless
EDA supplier Cadence Design Systems Inc. and Taiwan-based semiconductor foundry UMC have announced a collaborative agreement to develop a comprehensive reference solution for complex wireless designs
2006-09-08 Cadence, SMIC co-develop digital ref flow for 90nm tech
Cadence Design Systems and SMIC announced that they have jointly developed the low-power digital reference flow to support SMIC's advanced 90nm process technology.
2003-09-29 Cadence, dSPACE partner on automotive design flow
Cadence Design Systems Inc. has collaborated with dSPACE, a supplier of tools for developing and testing new mechatronic control systems
2003-09-24 Cadence, Chartered partner on 90nm design solutions
The two companies have collaborated to provide a streamlined path from design to volume production for Chartered NanoAccess 90nm manufacturing technologies
2006-07-26 Cadence, ARM introduce first automated design for ARM Cortex-A8
Cadence Design Systems Inc. and ARM the joint development of the first automated RTL design and implementation flow for the ARM Cortex-A8 processor.
2009-10-23 Cadence, ARM co-develop next-gen SoC design flow
Cadence and ARM will combine their technologies to create a next-generation SoC design flow.
2002-02-19 Cadence, Agilent to speed electronic design in wireless, wireline industries
Cadence Design Systems Inc. and Agilent Technologies Inc. have signed a multi-year technology alliance aimed to accelerate electronic product development in the communications industry
2005-07-27 Cadence, Accent, ARM improve low-power design
Cadence Design Systems Inc. disclosed that Accent has validated a low-power design flow using its Encounter digital IC design platform and ARM Artisan physical IP.
2005-02-01 Cadence tool aims to tackle parasitics in RF design flow
The new release from Cadence Design Systems Inc. addresses the leading cause of wireless design failures
2005-12-23 Cadence tech provides Intersymbol with reduced design cycles
Intersymbol has successfully qualified Cadence Design Systems' Encounter digital IC design platform in its mixed-signal design flow.
2003-12-05 Cadence streamlines PCB design flow
Cadence Design Systems has released the SPECCTRAQuest for Electrical Engineers (EE) software that enables electrical engineers to manage the rapidly increasing high-speed content on complex PCB systems
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