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2006-09-20 Agilent, Peregrine expand agreement on RFIC design tools
Agilent Technologies Inc. announced a multi-year, multi-site agreement in which Peregrine Semiconductor has expanded its investment in Agilent's RFIC design tools
2007-05-11 Agilent, Mentor team on automotive network design
Agilent Technologies announced a partnership with Mentor Graphics, under which Agilent will license certain products in the Mentor Volcano product line to help automotive engineers develop electronic products faster and under budget while meeting quality requirements.
2002-08-26 Agere licenses Cadence ASIC design tool
Cadence Design Systems Inc. has agreed to provide customers of Agere Systems with a temporary license for its First Encounter design tool.
2004-06-04 ADI tool enables designers to simulate ADC performance
ADI has launched its ADIsimADC software design tool that allows systems designers to simulate ADC performance, speeding the evaluation and design process.
2015-07-30 ADI RF design tools now support Hittite products
Analog Devices acquired Hittite in 2014 and now offers the broadest portfolio of RF and microwave products covering the entire signal chain.
2002-07-01 Actel upgrades FPGA design tool bundle
Actel Corp. has released an upgrade to its Libero FPGA design environment with new ease-of-use and run-time enhancement features
2002-04-04 AccelChip tool synthesizes Matlab designs
AccelChip Inc. believes it has cracked a longstanding design problem with a new tool that creates synthesizable Verilog and VHDL code from Matlab and Simulink designs for use in Xilinx or Altera FPGAs.
2011-09-27 A primer on 3D-IC design challenges
Know the 3D-IC design challenges such as system exploration, floorplanning, analysis, and design for test (DFT), and learn how designs will evolve as 3D-IC goes on to become a necessity for managing power, performance, form factor, and cost goals
2004-01-19 64-bit Linux speeds IC design tool
ReShape is reporting significant speed and capacity increases for its PD Optimizer tool suite on 64-bit Opteron and Athlon processors running Linux
2010-09-16 32-bit microcontroller design tool kit available
STMicroelectronics releases hardware development platform for STM32 line of 32-bit microcontrollers
2005-06-06 Zuken claims 3-D routing checker cuts design time up to 6 weeks
Zuken has introduced a two- and three-dimensional routing checker for high-voltage PCBs that the company claims cuts typical design time by six weeks
2009-03-20 Yield tool minimizes design re-spin
Synopsys Inc. introduced Yield Explorer, a new yield management tool that minimizes design re-spin through rapid and comprehensive capture of design-process-test interactions causing low yield.
2003-11-17 XML embedded Web support eases design
The simplest method to implementing XML embedded devices is supporting the Web processes completely in external software.
2004-10-28 Xilinx, Ansoft team on gigabit interconnect design
FPGA Xilinx and EDA tool house Ansoft have crafted a gigabit interconnect design kit that allows designers to perform accurate "what if" analysis on high-speed printed circuit board (PCB) and backplane designs.
2006-02-09 Xilinx upgrades PlanAhead tool
Xilinx announced version 8.1 of its PlanAhead software, a hierarchical design and analysis solution for Virtex-4 and Spartan-3 FPGAs
2003-09-10 Xilinx upgrades ISE FPGA design suite
Xilinx Inc. has improved clock performance, software run-time and area utilization in its Integrated Software Environment FPGA design suite
2006-07-07 Xilinx unveils design tools for 65nm Virtex-5 FPGAs
Xilinx has announced the latest release of its design solution, the 8.2i ISE tool suite, now supporting the company's newest line of 65nm Virtex-5 domain-optimized FPGAs.
2004-09-29 Xilinx tool suite targets system-level design
Xilinx introduced v6.3i of the Platform Studio for system-level embedded processing design on Xilinx Platform FPGAs
2006-03-16 Xilinx releases Virtex-4 FPGA based DDR2 reference design
Xilinx announced the immediate availability of the Virtex-4 FPGA based 667Mbps DDR2 reference design delivering high bandwidth and reliable memory interface solution
2002-12-02 Xilinx releases v2.3 of DSP tool System Generator
Xilinx Inc. is shipping v2.3 of its System Generator for DSP tool, which features enhanced multipliers that allows designers to achieve speeds of up to 285MHz while using the Virtex-II series of FPGAs
2007-08-09 Xilinx provides free reference design for DDR2-400
Xilinx unrolls a free reference design that enables designers to quickly implement 400Mbps DDR2 SDRAM interfaces with Spartan-3 FPGAs
2003-12-18 Xilinx platform accelerates FPGA-based DSP design
Xilinx Inc. has announced that it is shipping its next generation System Generator for DSP tool v.6.1 that allows designers to link their custom boards via a generic JTAG interface and reduce overall simulation time
2004-06-25 Xilinx launches 200MHz QDR II SRAM memory tool kit
Xilinx developed a programmable 200MHz QDR II SRAM Memory Tool Kit that provides a comprehensive resource for system designers interfacing to QDR II SRAM devices
2008-03-26 Xilinx design tools suit logic, embedded, DSP
Xilinx has introduced its ISE Design Suite 10.1, a single unified release providing FPGA logic, embedded and DSP designers with immediate access to the company's entire line of design tools with full interoperability
2006-06-29 Xilinx delivers design solution for 65nm FPGAs
Xilinx has released the 8.2i Integrated Software Environment (ISE) design solution supporting the company's 65nm Virtex-5 FPGAs
2006-04-07 Xilinx beefs up AccelDSP Synthesis tool
Xilinx announced the immediate availability of the new AccelDSP Synthesis 8.1 tool and AccelWare DSP libraries of algorithmic intellectual property
2006-02-06 Xilinx announces new DDR2 reference design
Xilinx's DDR2-SDRAM interface uses the Virtex-4 ChipSync technology, a run-time calibration circuit that improves design margins and overall system reliability while reducing design cycles
2004-02-02 Write your own PCB design rule checker
After PCB design is captured in a schematic tool, a design rule checker (DRC) must be run to find any design rule violations. This must be done before backend processing starts.
2010-05-18 Wipro taps Mentor tools to reduce design time
Mentor Graphics Corp. and Wipro Technologies are partnering to continue to enable time-to-market and first-time right solutions to their global product engineering customers.
2003-07-29 Visualization tool adds PCB design support
AutoVue, a widely-used visualization and collaboration tool, is targeting EDA in its latest release
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