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What does IC design verification mean?
IC design verification refers to the process of determining whether or not the design of a product, of a given development phase, satisfies the conditions imposed from the start.
total search1903 articles
2007-08-17 Xilinx teams with EDA giants on 65nm FPGA verification
Xilinx has announced a collaboration with three major EDA companies to address the challenges of 65nm ultrahigh-capacity FPGA design verification.
2005-05-09 Xilinx introduces new design tools for its DSPs
Xilinx introduced new design tools aimed at easing the implementation of high sample rate or multi-channel signal processing designs onto Xilinx DSP devices
2007-08-02 Winbond adopts Cadence emulator to ease verification
Cadence Design Systems announced that Winbond Israel has adopted the Cadence Incisive Palladium emulator system for its advanced system-level verification needs.
2013-07-22 Virtual design, verification for e-Mobility
Learn how to address many of the emerging engineering challenges that carmakers now face.
2002-05-24 VIA adopts Avant! Star-SimXT for SoC design verification
VIA Technologies Inc., a developer of PC core logic chipsets, microprocessors, multimedia and communications chips, has selected Avant! Corp.'s Star-SimXT simulator for sign-off verification of its SoC designs
2009-03-02 Verification tools receive upgrades
Jasper Design Automation's ActiveDesign with behavioral indexing is an IC design tool billed as enabling design engineers to capture and preserve intended design behavior as it is being implemented
2011-04-21 Verification tool offers advanced analysis, debug
Synopsys, Inc. has introduced the CustomExplorer Ultra mixed-signal verification environment that offers a comprehensive regression analysis
2002-03-11 Verification tool enables rapid ASIC prototyping
Designed for creating ASIC and SoC prototypes using off-the-shelf FPGAs, the SpeedGate Direct System Verification environment addresses all hardware prototype creation and verification challenges
2002-07-10 Verification startup wants everyone to go 'formal
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2010-05-14 Verification platform suits algorithm design, LSI testing
Xilinx K.K. and Hitachi Information & Communication Engineering Ltd have released the LogicBench system-level design verification platform that uses Xilinx Virtex-6 LX760 FPGA.
2010-04-26 Understanding high-level synthesis design's advantages
It is vitally important to verify the design before performing high-level synthesis, not after. It is not effective to synthesize a design that does not work
2013-02-12 UMC, Synopsys partner for design verification at 28nm
UMC selected Synopsys' IC Validator physical verification product for lithography hot-spot checking to accelerate physical signoff at 28nm
2005-03-29 TSMC to open design center in Shanghai, says report
Taiwan Semiconductor Mfg Co. Ltd the world's largest foundry chip supplier, is planning to open a design-service center at its mainland Chinese factory in Shanghai, according to a Taiwan Economic News report, citing un-named executives at the wafer fab as sources
2002-04-11 TransEDA SoC verification tool combines emulation, simulation results
Designed to accelerate SoC verification, TransEDA plc's VN-Cover Emulator allows users to collect coverage data, and merge them with simulation results to measure a design's verification completeness.
2012-05-18 TowerJazz reference design flow tips Cadence tech for power management
TowerJazz's Reference Flow 2.0 power management analog/mixed-signal reference design flow integrates power management devices with control logic
2010-06-08 Tools offer shared database for design, verification
From Jasper Design Automation come improved versions of the ActiveDesign and JasperGold tools with capabilities that bridge the divide between chip design and verification by sharing common database.
2002-08-09 TI deploys Cadence verification systems
TI has installed the Palladium design verification systems of Quickturn through the QuickCycles EXtended (EX) Access program.
2003-01-08 Tharas signs ICON Design as distributor in India
Tharas Systems Inc. has named ICON Design Automation Pvt. Ltd as its distributor in India
2007-09-20 Taiwan's MediaTek adopts Mentor's formal verification tech
Mentor Graphics announced that Taiwan's MediaTek has selected the 0-In formal verification technology to make it an integral part of its verification flow for their next generation design projects.
2010-05-11 Synthesis tool handles complex design verification
NextOp is bridging design and verification with the introduction of an assertion-based verification solution to automatically generate functional coverage properties from testbench and RTL.
2011-06-03 Synopsys, Rhode & Schwarz collaborate on LTE design
The collaboration of Synopsys and Rhode & Schwarz on the LTE and LTE-Advanced standards will give a solution between system design and hardware prototype verification gap.
2002-08-30 Synopsys to acquire IC design verification firm
Synopsys Inc. has signed a definitive agreement to acquire all outstanding shares of Co-Design Automation
2004-09-03 Synopsys solutions to support IPCore design flow
Synopsys Inc. disclosed that China-based IPCore Technologies Corp. has signed a multi-million dollar agreement.
2005-10-27 Survey finds verification tool use largely unchanged from 2004
The 2005
2005-09-01 Sub-$200 tools power 'farms' for verification
Stanley Hyduke sees a not-so-distant future for the semiconductor industry in which companies are running thousands of simultaneous simulations to cope with the verification bottleneck
2013-07-31 SpeedBridge adapter enables PCIe 3.0 design verification
The SpeedBridge Adapter for PCIe 3.0 provides easy bring-up and fast debug of PCIe-based designs when used with a Cadence Palladium Verification Computing Platform
2003-10-01 Spectrum analysis key to speed up 3G verification
Time-to-market, competitiveness and market share are important considerations on the increasingly aggressive 3G market.
2010-09-20 SMIC taps Cadence for design solutions
Cadence offers front-to-back solutions for design, verification and implementation
2007-06-14 Simulink design suite adds formal methods
Adding formal design methods to its widely used Simulink model-based design suite, The Mathworks Inc. has introduced the Simulink Design Verifier, which generates tests and proves properties for models from the company's Simulink simulation platform and Stateflow design and simulation tool
2009-07-07 Signal generators tailored for RF design verification
PXI modular test platform welcomes new family members with the arrival of two RF signal generators.
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