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2008-04-14 Capturing and sharing IP in PCB design
This article discusses the disconnect between the digital design engineer's vision of bus structures on the PCB and the failure of tools to capture and route this vision in an efficient manner
2015-09-16 Resolving giga-scale challenges in memory design
Advanced designs are more complex and larger than ever before, and designers are balancing between accuracy and performance for large scale memory simulation and verification.
2008-02-11 Putting the system in electronic system design
The narrow scope of most ESL approaches and tools has limited their adoption. A more encompassing methodology, one that steps beyond the SoC, is needed to dramatically reduce time, cost and errors in complex system development
2005-04-19 Mentor VP highlights growing need for systems design reuse
Henry Potts, vice president and general manager of Mentor Graphics Corp.'s System Design Division, said that electronics companies are searching for new strategies to manage intellectual property (IP) in a global setting as a way to offset a host of emerging challenges
2006-04-17 IC design flow integrated
Synopsys offers its customers the Pilot Design Environment, an integrated RTL-to-GDSII design system tailored to each customer's design infrastructure
2009-09-22 Execs weigh in on SoC design challenges
The ASIC versus FPGA debate took an interesting turn, as executives from two design tool firms offered dueling keynote address on the virtues of and challenges facing FPGA-based and ASIC-based SoCs designs
2014-02-13 Energy design through unified hardware abstraction
Learn how to achieve energy-efficient solutions through optimal alignment across the pre- and post-silicon phases of energy optimisation supported by unified design flows, abstractions and formats
2009-03-24 Electrical design tool targets truck OEMs
Mentor Graphics Corp. announced the deployment of the CHS electrical systems design tool suite by a leading truck OEM
2010-12-24 Design methods shift to software, part 2
Designing via block level IP integration with virtual platforms shortens the number of steps between design intent and having working hardware and software
2010-11-30 Design methods shift to software
Changes in electronics design methodology seem to occur in ten-year stagesfrom the IDM's of the 1970s, ASICs in the 1980s, fabless companies in the 1990s, to the 2000s when application software took control
2002-04-30 Deep-submicron flows need an overhaul, designers say
Design flows for deep-submicron ICs need an overhaul, attendees of last week's Electronic Design Processes (EDP-2002) workshop agreed
2005-06-13 Celoxica ESL design suite upgrade expands speed, size limits
Celoxica's DK Design Suite introduces VHDL and Verilog optimizations that work with Design Compiler from Synopsys Inc
2005-02-01 Cadence tool aims to tackle parasitics in RF design flow
The new release from Cadence Design Systems Inc. addresses the leading cause of wireless design failures
2012-06-01 ASTC, Tanner to partner in ASIC design
John S. Zuk, vice president for marketing & business strategy at Tanner EDA, specified that ASTC teams will be utilizing the complete Tanner EDA tool suite.
2015-01-07 Using sub-threshold techniques for IC design
The use of sub-threshold techniques can be a powerful way to create circuits that consume dramatically less energy than those built using standard design practices
2014-12-04 Protecting FPGA system with secure authenticator
Learn about the general problems that counterfeiters pose for original equipment manufacturers and end customers, and how these concerns can be addressed.
2014-05-08 POET integrates electronic, optical elements in one chip
The Planar Opto Electronic Technology (POET) platform is semiconductor fabrication process that uses gallium arsenide technology to combine electronic and optical elements on a single integrated circuit
2008-11-17 Green design improves normally-on switches
As green energy trends become more popular, design engineers should re-examine some of the circuits that continually consume power to reduce overall system power use
2011-06-09 Design firm debuts Silicon One initiative
Magma Design Automation has launched Silicon One, an initiative that is intended to make silicon profitable for customers
2015-12-21 Design concerns when choosing resonant LLC converters
Here is a look at the characteristics of a resonance LLC topology and, in particular, the potential failure mechanism of MOSFET devices during the functionality of the system
2008-06-23 Altium adds publishing, version control for design tool
Altium's unified solution, Altium Designer, is based on a single data model that lets designers synchronize data across all the electronics design stages, allowing changes in one domain to be reflected throughout the design, from schematic capture, PCB layout and FPGA design through to embedded software development
2006-07-20 Design forum is heavy on ESL this year
The Design Automation Conference next week in San Francisco, California comes with a program heavy on ESL and embedded systems design, design-for-manufacturability, power-aware design and verification. See the details inside
2001-02-01 Biomorphics tech takes on electronic consumer market
This technology news article describes the penetration of robotics in the field of consumer electronics, particularly children's toys.
2006-09-18 Leverage ESL with legacy RTL
Platform-based design lets designers automatically integrate ESL modules with existing RTL IP. John Wilson gives his tips and tricks
2006-12-15 Wipro selects Cadence as primary VLSI vendor
Wipro Technologies, a global independent R&D services provider and the services arm of Wipro Ltd, has chosen Cadence Design Systems as its primary vendor for VLSI and system design solutions
2005-01-21 Where startups could bloom
If you're looking to launch a startup, EDA is a tough business. Just about every sector of this small market is overcrowded.
2006-06-15 Spirit enters IEEE standards process
The Spirit standard for IP integration and reuse has entered the IEEE standards process with the formation of the IEEE P1685 working group.
2006-07-04 Semicon forecast: second half will be rough
2006 has seen it alla stock option scandal, different chip predictions, materials shortages and it's not even over yet. Here's our take on where things stand and where we see the industry heading.
2002-06-05 RTL-to-GDSII flow shows signs of maturity
The RTL-to-GDSII design flow will take center stage at next week's Design Automation Conference in New Orleans, as several vendors show new technologies intended to solidify an all-in-one flow
2005-05-02 It's time to move DFT to a higher level
Today, the 'D' in DFT does not really stand for design. All too often, at the gate level, it stands for do-it-late
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