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2008-08-21 ST showcases first PHY IP for 6Gbit/s SATA HDDs
STMicroelectronics has demonstrated the world's first MIPHY PHY interface for the new 6Gbit/s SATA technology
2004-10-25 Samsung, Marvell develop 3.0Gbps hard drive
Samsung Electronics Co. Ltd and Marvell have developed hard disk drives (HDD) that utilize the Marvell 88i6525 system-on-chip (SOC
2012-02-17 PHY IP enables fast HDMI integration
The DesignWare HDMI 1.4 IP solution is fully compliant with both HDMI and high-bandwidth digital content protection specifications and has received certification from HDMI authorized testing centers.
2002-04-12 NurLogic PHY core provides 12.8Gbps bandwidth
Manufactured using a 0.135m CMOS process, the AmberBridge HyperTransport PHY core provides an aggregate bandwidth of 12.8Gbps and has been developed for designers of high performance networking, telecommunications, and embedded systems
2004-07-06 LSI Logic PHY interface supports to 667Mbps
LSI Logic's new PHY interface to QDR-2 SRAM memory enables the next generation of high-end network routers, switches and host bus adapters
2006-05-12 Integrated tester checks the WiMAX PHY layer
This $60,000 software-upgradeable product from LitePoint looks like just the ticket for testing wireless WiMAX designs based on the IEEE-802.16-2004 standard.
2010-08-27 DesignWare MIPI M-PHY IP now in 40-nm process tech
Synopsys, Inc. has just announced availability of the DesignWare MIPI M-PHY IP for next-generation high-speed interfaces based on the newly ratified MIPI Alliance M-PHY specification. Both DesignWare DigRF v4 controller and M-PHY IP answer the demand for higher throughput in LTE and WiMAX mobile devices
2009-09-30 40nm PHY cuts validation, dev't costs in HDDs
LSI Corp. has begun shipping samples of the 40nm multi-interface PHY IP designed for notebook, desktop and enterprise hard disk drive (HDD) market segments.
2011-04-14 Memory controller claims first DDR4 IP solution
Cadence Design Systems Inc. has introduced a DDR4 solution that it says will enable SoC designers to take advantage of the performance gains of the emerging DDR4 memory standard.
2007-05-14 DDR2 IP and configurability
The process of creating a PHY for a specific design is unique to every chip. The planning process traditionally starts with the pad frame design, although designs for the package and even the PCB can precede it
2002-07-26 Vitesse ends work on upcoming 10Gb, 40Gb chips
Vitesse Semiconductor Corp. is trimming its product lines, excising those whose prospects have withered in the telecom recession said CEO Louis Tomasetta.
2015-06-02 USB technology in a battery-powered IoT era
Here's a look at how the USB standard has evolved to a state-of-the-art technology that allows even small battery-powered devices for the IoT to communicate with anything.
2009-03-12 USB 3.0 wins Gennum support
The USB's drive into Gbit territory got another backer when Gennum Corp. announced an integrated PHY and controller for USB 3.0 available for licensing as a silicon block
2015-05-22 Testing SATA DevSleep for SSDs
Learn about DevSleep implementation details as well as new conformance tests that help ensure critical features operate properly and achieve the desired power savings without sacrificing performance.
2008-09-19 Speedy read channel fit for enterprise HDDs
LSI Corp. has extended what it claims is the industry's broadest portfolio of SoC components for HDDs with the introduction of new read channel and PHY technologies
2008-07-02 Serial ATA and the evolution in data storage technology
Before we can fully appreciate the benefits behind the SATA standard, it makes sense to look back on the history of data storage.
2008-07-15 Powerline standard needs more support
A recent vote to confirm a proposal from the HomePlug Alliance and the Panasonic-led HD Power Line Communications group for a powerline home networking standard failed to get the required number of backers.
2002-04-02 Post acquisition spree, Intel strives for key to comms
Intel Corp. hasn't made heads or tails of the communications industry. As the company bought up startups, it was simply collecting one of everything, with no central strategy for interlocking the pieces.
2003-11-03 Oxford bridge chip offers 88MBps transfer rate
The OXFW912 from Oxford Semiconductor is claimed as the first FireWire800 (IEEE1394b) to IDE (ATA7) bridge chip to maximize transfer rates for both single- and dual-disk drives.
2013-09-20 NXP, TTTech to co-develop automotive Ethernet switch chip
The jointly developed switch chip will enable applications with unshielded twisted pair cabling with BroadR-Reach PHY technology and will also come with three incorporated traffic classes
2003-06-16 Media networking is the next big thing
While the final technology choices for media networking platforms continue to evolve, there is no question that over time media networking will emerge as "the next big thing."
2002-06-24 inSilicon to supply Agilent with semiconductor IP solutions
inSilicon Corp. will be supplying USB 2.0 PHY IP solutions to Agilent Technology Inc.'s Semiconductor Products Group
2015-03-05 Examining the advances in mobile storage
We cannot fully predict the types of architectures that future mobile and storage products will have. However, the possibilities enabled by technologies under development today are exciting.
2006-05-26 Devices improve 1394b performance in notebooks, PCs
Texas Instruments announced two new 1394b devices at WinHEC.
2003-02-27 Agere core handles serial storage interfaces
Agere Systems has announced a configurable PHY core that can handle three serial storage interfaces
2013-06-28 Advantest rolls test sol'ns for mass-storage, CE devices
The T2000 platform, configured with 8Gsps waveform generator/8GHz digitizer module and 8Gbit/s digital module can handle fast SerDes PHY-layer interfaces and complex analogue waveform challenges
2005-08-30 SAS expander switching ICs offer secure zoning in blade servers
PMC-Sierra's PM8399 SXP 24x3GSec and SXP 36x3GSec ICs are next-generation SAS expanders that provide the switching function that resides between the SAS initiator and SAS or SATA hard drives in a server or storage system
2007-10-19 Rambus memory controller runs at 1,600MHz
Rambus Inc. has introduced its memory controller interface solution for DDR3 DRAM that provides PHY interface between the controller logic and DRAM devices for data rates of up to 1,600MHz
2007-06-18 PMC samples 6Gbit SAS 2.0 controllers
PMC-Sierra is pushing through the transition to 6Gbps Serial Attached-SCSI (SAS) hard disk interface with the sampling of Tachyon SPC 8x6G SAS controller for the SAS 2.0 standard
2006-08-18 Memory controller enables fast data transfers
IntellaSys Corp.'s new OnSpec xSil251 memory controller enables fast memory data transfers for UDMA CF/Microdrive or IDE Hard Disk Drive via USB 2.0 interface
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