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2009-01-29 The bad stuff impacting DDR timing budgets and ways to avoid 'em
Why bother with a DDR "PHY" when some SSTL I/O's with potentially a DLL or PLL slapped together with glue logic will do the trick of interfacing to an SDRAM
2005-09-08 How to interface DDR-II SRAMs with Stratix II devices
DDR-II SRAM devices offer enhanced timing margin and flexibility
2009-01-15 ZIF probe tips handle DDR, GDDR validation
Agilent Technologies and Hynix Semiconductor have developed a high-bandwidth, high-performance long-wire ZIF probe tip optimized for DDR and GDDR SDRAM validation
2015-05-11 Verilog-AMS vs SPICE view for DDR, LCD verification
In this instalment, we comparatively analyse the usage of both views from the perspective of DDR interfaces, LCD controllers and on-chip memories
2012-04-18 Survival guide to high-speed ADC digital outputs
Learn about the key attributes of CMOS, LVDS, and CML outputs, and their performance tradeoffs.
2005-09-08 How to interface DDR-II SRAMs with Stratix II devices
A step-by-step guide to interfacing DDR-II SRAMs with Stratix II devices for high-bandwidth communications, networking and DSP applications
2012-07-12 LeCroy differential probes span 8GHz to 13GHz
LeCroy probes are supplied with two solder-in leads rated to the full bandwidth of the probe amplifier.
2007-01-19 PMC/XMC module features ruggedized design
Pentek's Model 7141-703 is configured as a ruggedized PMC/XMC module fully compliant with the ANSI/VITA 20 conduction-cooling specification and ANSI/VITA 42 XMC specification.
2007-11-01 Obtaining best differential signaling results
Perfect symmetry isof courseunattainable. But designers can come close to that ideal to obtain the best differential-signaling results by following a few fundamental rules.
2012-11-01 Measure HSIC USB without disturbing the system
Take advantage of the known characteristics of HSIC USB to optimize the capture of data while minimizing disturbance to the system under test.
2008-12-25 Digital receivers tout speedy conversion
Mercury Computer Systems has announced the availability of the initial offering of the new Echotek Series family of high-performance, Virtex-5 FPGA-based digital receivers that allow high-speed/high-resolution data conversion
2011-08-15 Agilent logic analyzer touted as industry's fastest
The AXIe-based U4154A claims to be the industry's fastest logic analyzer with state capture speed of 4GB/s on 68 channels and 2.5Gb/s on 136 channels.
2007-02-19 Server-class COM features advanced Intel chips
Adlink's new computer-on-module products are based on the Intel 3100 that combines server-class memory and I/O controller functions into a single component.
2008-12-19 Rugged digital data recorder, signal conditioner roll
GE Fanuc Intelligent Platforms has launched the DDR-300 digital data recorder and the DSC-300 signal conditioner targeted for use in harsh environments
2003-09-08 Renesas releases 18Mb, 36Mb QDR II SRAMs
Renesas Technology has introduced a family of high-speed 18Mb and 36Mb QDR II SRAM devices for high-performance network and comms system equipment
2015-02-20 Keysight sol'n tests DDR4 x16 designs with logic analyser
The W4631A BGA interposer provides fast, accurate capture of address, command and data signals for debugging designs and making validation measurements
2008-08-01 Get DDR2 PCB design right the first time
DDR2 is still relatively new in the industry. It is an evolutionary improvement over its predecessor, DDR, and is the next memory standard, as defined by Joint Electronic Device Engineering Council document JESD79-2E. It behooves layout designers to completely comprehend the interface before doing layout so that the boards they design will be created "right the first time
2006-08-09 Electronics driver suits next-gen memory devices
Semtech unveiled wht it touts as the first off-the-shelf quad-pin electronics driver with the performance and differential signal capability required for testing next-generation, high-speed memory devices such as DDR III
2005-04-13 Digitizers tout 25Gbps
In the world of high-speed digitizers, Switzerland-based Acqiris has established a beachhead with its very high-speed data conversion instruments
2016-05-18 Benefits of adding isolation to LVDS interfaces
Adding isolation to LVDS interfaces provides a transparent solution that can be inserted into existing signal chains for high-speed and precision measurement and control applications
2005-03-22 Fully-Buffered DIMM testing enhances logic analyzers
Tektronix now has a Fully-Buffered dual in-line memory module tester for logic analyzers.
2005-10-21 VXS board packs dual 2.2GS/s A/D channels
The new Quixilica Neptune 2 VXS from TEK Microsystems combines field programmable gate arrays with dual 2.2GS/s data conversion channels.
2006-12-08 True Circuits rolls out silicon proven 65nm analog IP
True Circuits Inc. has announced "silicon proven" phase-locked loop and delay-locked loop hard macros using TSMC's 65nm process.
2015-09-28 The lowdown on MIPI D'PHY RX
MIPI D'Phy, a physical serial communicating layer connecting the application processor to the display device or the camera, offers advantages as the physical layer. Learn more about it.
2005-09-01 The changing face of automotive ECU design
Designers are moving away from MCUs and microprocessors and into programmable logic devices.
2004-11-01 Standard interface eases partitioning
Engineers opt for smart partitioning in wireless systems instead of integrating all components into a single system chip.
2007-12-20 Sony base station streams media content anytime, anywhere
The $250 Sony LF-V30 is 4G in the LocationFree line and adds Wi-Fi connectivity to Ethernet in its network interface.
2005-02-21 Software transforms many Windows-based realtime oscilloscopes
ASA's new software offers universality and multi-platform applicability.
2008-05-15 Serdes chipset claims 'best' jitter performance
National Semiconductor has introduced a Serdes chipset that the company claims delivers the industry's best output jitter performance of 35ps peak-to-peak and the best input jitter tolerance of 0.9 UI with a BER of 10-15.
2014-10-22 Samsung delivers 8Gbit 20nm DDR4 chips for servers
Beyond the 32GB modules, the new 8Gb chips will allow production of server modules with a maximum capacity of 128GB by applying 3D through silicon via (TSV) technology
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