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2004-02-27 | Year Round jack features 1.5 SWR Year Round Technology's hybrid female-male BNC right-angle PCB/panel-mount jack has a PE-606 insulator and PBT (94V-0) housing. |
2003-11-03 | Wave Tech D-subconnectors rated at 3A The IDC type of D-subconnectors from Wave Tech Co. Ltd features a PBT glass-filled insulator, female phosphor bronze contact, male brass contact, and gold flash and selective gold plated contacts. |
2003-12-12 | Wave Tech connectors have 500V dielectric voltage Wave Tech Co. Ltd has released its CF series of SMT type compact Flash memory-card connectors that features a PBT glass-filled UL 94V-0 insulator material, zinc alloy shell, and phosphor bronze terminal. |
2014-03-06 | Viewpoint: FD-SOI supports Moore's Law STMicroelectronics' Laurent Remont believes that when it comes to price, power, and performance, fully-depleted silicon-on-insulator comes into its own as a viable option in the journey towards 10nm process technology. |
2007-06-12 | UMC, ARM team on 65nm SOI solutions United Microelectronics Corp. and ARM announced that a test chip built with ARM silicon-on-insulator libraries was taped-out successfully on UMC's 65nm SOI process. |
2002-04-19 | TRONIC'S to use Soitec SOI wafers for MEMS technology MEMS contract manufacturer TRONIC'S Microsystems SA has selected Soitec's Smart Cut UNIBOND silicon-on-insulator wafers as the starting material for its SOI-based MEMS technology. |
2005-09-29 | Soitec, SEZ to speed industrialization of strained SOI substrates The Soitec Group and the SEZ Group have initiated a joint development program (JDP) intended to speed the industrialization of next-generation strained silicon-on-insulator (sSOI) substrates. |
2005-06-29 | SOI embedded DRAM company raises $16 million Innovative Silicon Inc., a developer of an embedded memory based on floating the body voltage for transistors implemented using silicon-on-insulator CMOS processes, said that Austin Ventures has joined with existing investors to lead a $16.0 million Series B round of investment in the company. |
2013-06-26 | Researchers develop nanoscale transistors without silicon A team of researchers at Michigan Technological University wanted to go beyond the limitations of semiconductors to create a transistor using a nanoscale insulator with nanoscale metals on top. |
2006-08-02 | Power connector saves PCB space Tyco Electronics has introduced a stacked MINIPAK connector with customized insulator options and a DualBlade contact design to reduce connector length and save PCB real estate. |
2002-12-03 | Noxtlon PLCC operates to 110C Shenzhen Noxtlon Electronic Co. Ltd has released a DIP type PLCC that features a UL 94V-0 glass-filled thermoplastic insulator body. |
2003-11-25 | Ningbo Zhenqin D-sub connector has 25 contacts Ningbo Zhenqin Electronic has released its DS1033 D-sub solder type connector that features a thermoplastic UL 94V-0 insulator and copper alloy contact. |
2004-03-29 | Motorola expands use of Synopsys software technology Motorola Inc.'s Semiconductor Products Sector (SPS) has expanded its agreement to license Synopsys Inc.'s phase-shift technology and mask synthesis software in order to apply the technology globally to its advanced 90nm silicon-on-insulator (SOI) semiconductor manufacturing process technology. |
2010-11-04 | MIM architecture promises better quantum tunnelling Researchers report a method for "quantum tunnelling" that uses metal-insulator-metal architecture which the researchers say will pave the way for faster, lower power and cooler running electronics. |
2004-03-12 | Lean Horn connector has compact, low profile design The phone jack series of A/V connectors from Lean Horn features a phosphor bronze contact material, and polyester, UL 94V-0 standard PBS insulator material |
2004-08-12 | Japan's TEL selected for European 'gate-stack' project Chip equipment vendor Tokyo Electron Ltd (TEL) has signed an agreement with France's CEA LETI (Laboratory of Electronics and Information Technologies) to develop a CMOS gate stack that includes a high-k insulator and metal gate materials and deposition steps for 45nm and lower manufacturing process nodes. |
2014-05-28 | Inkjet printing yields paper-based RRAM Inkjet printing can be used to stack an insulator material between silver and a carbon layer. The RRAM bit obtained for each stack is operated by changing the resistances of the insulator material. |
2007-03-19 | IBM goes 65nm for Cell processors IBM has started making its Cell processor on a 65nm silicon-on-insulator process at its East Fishkill, New York plant, moving from a 90nm process to achieve higher speeds and lower power. |
2008-09-19 | Group readies guide kit for SOI circuit design The SOI Consortium, an industry group set up to promote the use of designs on silicon-on-insulator wafers, has announced the availability of the first chapters of its SOI Implementation Guide. |
2010-04-05 | Graphene optical link achieves 6.1mA/W IBM Research exhibited an optical link using a graphene photodetector fabricated on a silicon-on-insulator (SOI) substrate that achieves 6.1mA/W at 1.55?m. |
2015-07-21 | Globalfoundries plans to start FD-SOI prod'n in Europe Globalfoundries is investing $250 million to develop and its own variant of a fully-depleted silicon-on-insulator (FD-SOI) manufacturing process and get it into production in Europe. |
2005-04-14 | Freescale, Soitec claim 45nm designs with strained SOI A collaborative effort between Freescale Semiconductor Inc. and Soitec Group has resulted in the ability to build 45nm CMOS devices using strained silicon-on-insulator (SOI) substrates, the companies claimed. |
2006-06-14 | Freescale demonstrates CMOS tech with strained SOI substrates Freescale Semiconductor demonstrated an advanced CMOS technology that utilizes strained silicon-on-insulator substrates that could deliver dramatic performance improvements. |
2004-08-19 | European alliance grows for 45nm gate stack push Collaborative research is cranking up in Europe, as France's CEA Laboratory of Electronics and Information Technologies (LETI) has gathered partners in a project to develop a 45nm-and-beyond CMOS gate stack with a high-k insulator and metal gate electrodes. |
2005-04-15 | Cypress, American Semi forge SOI foundry deal Silicon-on-insulator (SOI) specialist American Semiconductor Inc. (ASI) disclosed a foundry deal with the Silicon Valley Technology Center (SVTC), a division of Cypress Semiconductor Corp. |
2010-05-31 | Cadence, IBM co-develop 32nm SOI IP Cadence Design Systems Inc. and IBM have entered a joint development agreement to create high-performance integration-optimized IP under 32nm silicon-on-insulator (SOI). |
2014-11-05 | Button batteries to wear kid-safe coating The insulator, quantum tunnelling composite, is a rubberlike material that prevents the batteries from generating a current inside the human body but would still be able to power a device. |
2011-07-14 | Bonding system targets 450mm SOI wafers EV Group has released a bonding system for 450mm-diameter wafers manufactured from silicon-on-insulator substrates. |
2014-03-06 | A detailed look at Micron-Sony's 16Gb ReRAM The ReRAM used CuTe as the active memory material where in a CbRAM cell the growth and removal of a Cu filament link through an adjacent thin insulator to a lower electrode yields two NV logic states. |
2013-11-20 | Yole: Diamond materials market for chips to top $43M The growing interest in diamond for optical and thermal applications, and for high-power, high-frequency devices working at high temperatures is expected to drive the market, said Yole Developpement. |
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