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2011-08-23 Integer DSP core processes 100 GMACs/s at 1W
Tensilica's integer DSP core, the BBE64, can compute 100 GMACs/s in less than a Watt and can support designs up to more than a million logic gates.
2001-05-23 TMS320C6000 integer division
This application note gives an explanation on the implementation of division in Texas Instruments' TMS320C6x DSP family
2002-08-19 RF integrates with DSP in 4G apps
This article discusses a direct-conversion RF architecture that uses CMOS technology to design a DSP suitable for 4G apps
2004-10-08 MIPS adds SIMD instructions in DSP extension
MIPS Technologies launched DSP ASE, digital signal processing extension to the MIPS architecture
2001-04-15 DSP/CPU core steers video/audio formats
Television will take on a completely new design direction thanks to very long instruction word (VLIW) technology.
2015-10-07 DSP-enhanced MCUs, SoCs target wireless designs
There is a predicable rhythm to MCUs and processor-based SoC product introductions in those segments of the electronics market focused on consumer wireless, video, and mobile PC/laptop designs.
2009-09-03 DSP engine targets telecom, VoIP apps
Tensilica Inc. has introduced the ConnX D2 16bit dual-MAC (multiply accumulate) DSP engine for its proven Xtensa LX dataplane processor cores for SoC designs
2007-06-18 Achieve better DSP code from compilers
Compilers can't generate efficient DSP code without help from the programmer thus learning how to coax efficient signal processing object code out of a compiler is an important skill and can reduce (or eliminate) the amount of time you'll spend optimizing at the assembly level
2015-05-07 The MCU guy's guide to FPGAs: The hardware
Embedded design engineers usually come from MCU background, so they often have only a vague idea as to what an FPGA is. In this article, we'll consider the hardware aspects of the FPGA universe.
2007-03-01 New middleware takes SDR beyond military apps
middleware specialists are exploring new ways to optimize architectures for SDR operations.
2010-03-05 MCU with floating point unit delivers higher precision
Atmel Corp. is offering its 32bit AVR UC3 product family designed with a floating point unit MCU to perform arithmetic calculations on decimal numbers in fewer clock cycles with higher precision.
2005-03-01 FPGA accelerates real-time app performance
Designers are eyeing new FPGAs with faster and better performance in DSPs and real-time applications. Rodger Hosking and Richard Kuenzler of Pentek say why.
2005-05-23 Floating-point library supports TI fixed-point TMS320 DSPs
Sundance Digital Processing Inc.'s GDD600 is touted as a new and powerful library of floating-point DSP vectors and functions for DSP applications targeting Texas Instruments' TMS320 DSP-based platforms
2001-09-25 A snapshot: data movement power of the SHARC
This application note describes the ability of the SHARC DSP to balance on/off chip data movement with processing (integer or floating point) performance.
2015-05-08 The MCU guy's guide to FPGAs: The software
Embedded design engineers usually come from MCU background, so they often have only a vague idea as to what an FPGA is. In this article, we are going to consider the FPGA equivalent to MCU software.
2015-11-12 ARM expands core line-up for smartphones, IoT
The Cortex A-35 brings 64bit capabilities to entry-level handsets while the ARMv8 Cortex-M architecture enables hardware-based security on the smallest 32bit MCUs with minimal impact, even on real-time.
2002-03-14 UMC licenses ARM cores
Taiwan Semiconductor foundry United Microelectronics Corp. has licensed the ARM946E core and the ARM1022E core.
2007-12-28 Tensilica upgrades Xtensa cores, tools
Tensilica has shrunken the minimum core size of its Xtensa 7 and Xtensa LX2 configurable processor families. It has also enhanced the Xtensa Xplorer design environment to make customization easier and faster.
2007-07-23 Telecom timing chip enables 1G, 10G SyncE
Maxim's DS3104 chip is said to be the industry's first to provide full carrier-class clock synchronization for new Synchronous Ethernet line cards and mixed SONET/SDH/SyncE line cards.
2015-03-03 Real-time FPGA numerical computing for ULL-HFT
In this article, we will look at merits of Decimal Floating Point Arithmetic acceleration. We will also explore a numerical computing model for Ultra-Low Latency High Frequency Trading (ULL-HFT) environments.
2005-06-01 Programming GPUs for general computing
GPU-based computing is conceptually straightforward, and a variety of high-level languages and software tools can simplify programming.
2015-07-06 Optimise clock synthesis in heterogeneous networks
Learn about new IC architectures that enable lower power, smaller form factor and higher performance small cell clock synthesis.
2015-05-25 Nothing left to be invented in embedded control (Part 2)
In this instalment, we learn that the power of the core independent peripherals is multiplied when we connect them together, relieving the CPU from potentially large computational loads and real-time constraints.
2005-08-19 New MCU models from Renesas
Renesas Technology announced four SH7261 high-performance MCU models, incorporating the 32bit RISC MCU SuperH family's new SH2A-FPU CPU core, for use in car audio, home audio and similar digital audio products.
2007-05-30 MIPS rollout spotlights high-end IP core
MIPS has announced a new 32bit MCU that includes superscalar, out-of-order technology for use in a range of high-performance applications.
2008-05-05 Introduction to video compression
In this article, we explore the operation and characteristics of video codecs. We explain basic video compression algorithms, including still-image compression, motion estimation, artifact reduction, and color conversion. We discuss the demands codecs make on processors and the consequences of these demands.
2014-11-24 Improve software through memory-oriented code optimisation
In this instalment, we will explore different software code and compiler optimisation techniques that can be used to boost memory performance in embedded systems.
2014-11-25 Improve software through memory layout optimisation
In this second instalment, we will provide tips on various memory layout optimisation techniques that can be used to improve embedded system performance.
2007-11-06 Imagination unrolls Meta HTP multithreaded processor
Multimedia processor licensor Imagination Technologies Group plc has announced Meta HTP, an implementation of the second generation of its multithreading Meta processor architecture.
2009-02-04 Frequency domain tutorial: Understanding spectral components (Part II)
The second part of a two-part series, this articles focuses on describing a quadrature signal, having a real and an imaginary part, that is a function time.
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