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2013-10-21 3D memory improved via laser thermal anneal application
Laser thermal anneal application can enhance the current in vertical polysilicon channel devices for 3D memory, as demonstrated by Imec and Excico.
2003-06-27 Ultratech readies gear to fab sub-65nm chips
Ultratech said that it has optimized its laser thermal processing (LTP) technology to form junctions down in the 20nm technology node, and is now ready to enter the commercialization phase of its LTP program
2004-04-23 VLSI papers weigh 65nm, new circuits
While technologists look to 65-nanometer nodes, circuit designers by and large are two generations back.
2005-09-27 Strained silicon to take IEDM spotlight
With high-k dielectrics apparently delayed beyond the 45nm node, this year's International Electron Devices Meeting will focus on second-generation strained-silicon techniques as the main pathway to faster transistors.
2007-10-19 45nm challenges shake RTP tool arena
There have been many changes in the RTP tool arena in the 45nm node and beyond, not the least of which is that Axcelis Technologies Inc. has decided to cease future RTP tool product development.
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