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logic analyser What is a logic analyser? Search results

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What is a logic analyser?
An instrument that allows you to observe the behaviour of digital signals in an embedded system.
total search22 articles
2015-10-15 Logic analyser supports up to 4Gb/s debugging data rates
Keysight unveiled a logic analyser module that claims to deliver the industry's highest-data-rate state mode, highest timing mode (10GHz) and deepest memory depth (up to 400MB).
2015-02-20 Keysight sol'n tests DDR4 x16 designs with logic analyser
The W4631A BGA interposer provides fast, accurate capture of address, command and data signals for debugging designs and making validation measurements.
2013-11-22 Synchronise handshaking between ADCs and DAQs
Here's a look at data converters in SOCs using data acquisition systems.
2015-08-19 Keysight unveils memory analysis software
The B4661A claims to deliver the industry's only functional-level compliance violation testing capability across DDR4 and LPDDR4 speed changes.
2015-04-09 Exploring an approach for improving emulation
Emulator debug capacity will not significantly increase in the near future. Instead, an obvious solution is to embed assertions, which can allow emulation to run at very nearly full speed.
2013-11-08 Building your own prototyping lab
Know the important pieces of equipment beginners should acquire first.
2013-05-07 Why DDR4 is not just a speed bump
The move to DDR4 incorporated changes to improve both speed and width, but there are other more significant changes.
2013-06-20 What's our virtual firmware game plan?
Virtual development is here and the timing is just right, as more and more industries demand connected embedded systems.
2014-04-09 Troubleshoot, fix problems on the go
Know how particular oscilloscopes can be used to capture and isolate waveform anomalies to identify source of the problems.
2013-09-10 Monolithic flash memory data recovery solution dev't
ACE Data Recovery recently developed custom built hardware and software solutions that allow data recovery from monolithic flash memory devices.
2014-10-01 Five hurdles to FPGA-based prototyping
Despite the advantages offered by FPGA-based prototyping, there are some significant hurdles to overcome. The five challenges presented here surfaced early on, and they haven't changed much over the years.
2013-04-29 Critical issues for functioning JESD204B interface
Know the interface from an ADC to FPGA for JESD204B, how to identify when it is working right, and how to troubleshoot it if something is not quite right.
2012-12-21 Altera, ARM roll out FPGA-adaptive embedded software toolkit
The ARM Development Studio 5 Altera Edition toolkit is geared to remove the debugging barrier between the integrated dual-core CPU sub-system and FPGA fabric in Altera SoC devices.
2012-10-05 Altera moves from Cu to optical backplanes
Improving the I/O bandwidth to support 28Gb/s backplane links and a new DSP architecture that focuses on the bandwidth are key elements of the 20nm products that Altera will launch next year.
2014-04-30 Agilent crams features into portable oscilloscopes
The Infiniium S?Series provides 10bit ADC signal integrity for bandwidths up to 8GHz, while the InfiniiVision 6000 X-Series has bandwidths up to 6GHz featuring 6-in-1 integration and multi-language voice control.
2013-06-11 Address jitter, noise with DDR4 (Part 2)
Learn about the DDR4 eye mask and how it can be used to improve designs.
2015-05-22 Testing SATA DevSleep for SSDs
Learn about DevSleep implementation details as well as new conformance tests that help ensure critical features operate properly and achieve the desired power savings without sacrificing performance.
2013-01-15 Optocouplers for safe, reliable electrical systems
There are several technologies that can provide electrical isolation, but optocouplers deliver safety and protection unparalleled by any other isolation technology.
2014-10-23 Is concurrent engineering fit for FPGA power design?
Find out whether the complexity and potential consequences of late design cycle and worst-case FPGA power system design are sufficient to justify adoption of concurrent engineering practices.
2014-03-12 Examining field-programmable RF chip
Here's a look at a chip that comes from the wireless domain and is touted to bring exciting new possibilities.
2014-11-12 Determine acceptable jitter level in embedded design
Learn about the nuances of clock jitter specifications, and know how to determine the acceptable level of jitter early on in the development cycle to prevent dire impact on end product release schedules.
2016-03-31 Bluetooth module enables compact, low-power wireless designs
The Blue Gecko BGM113 from Silicon Labs combines a 2.4 GHz Blue Gecko wireless SoC and a high-efficiency chip antenna into a complete, ready-to-use system.
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