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2007-11-27 TSMC taps Synopsys' design-to-mask data processing software
TSMC has successfully implemented Synopsys' new PCX technology to reduce design-to-mask cycle-time for its advanced process technologies
2007-09-26 Voice-synthesis LSI allows addition of playback functions
Oki Electric Industry started shipping samples of the ML22310 voice-synthesis LSI series, which allows addition of short-voice playback functions such as warning sounds and voice guidance to electronic devices
2006-02-14 New patterning synthesis solution for 65/45nm
Invarium unveiled DimensionPPC, a unified, full-chip process and proximity compensation product for patterning IC layouts at 65nm and below.
2007-02-19 MCU integrates 8bit CPU, voice synthesis LSI
Oki Electric Industry has equipped its ML610300 series MCU with an 8bit CPU core and voice synthesis LSI
2005-05-25 LSI Logic eliminates mask charges for entry level platform ASICs
LSI Logic Corp. added a pair of new slices to its RapidChip Integrator2 platform ASIC family that the company says provide high-volume ASIC and FPGA designers with a way to eliminate many design and development costs, including those associated with photomasks.
2005-04-07 Logic synthesis 'dying
Standalone logic synthesis will disappear and fold into physical design, said Rajeev Madhavan, Magma Design Automation CEO, at a keynote speech
2007-07-17 Cadence acquires pattern-synthesis tech developer
Cadence Design Systems has acquired Invarium, a developer of advanced lithography-modeling and pattern-synthesis technology
2005-06-09 TI sticks with Synopsys for 65nm, 45nm nodes
Texas Instruments Inc. has decided to extend its use of design-for-manufacturing EDA tools from Synopsys Inc. to the 65nm manufacturing process node and has selected two Synopsys technology CAD tools for use at the 45nm node, Synopsys said
2004-09-17 Synopsys, Photronics form DFM collaboration
EDA software vendor Synopsys Inc. and Photronics, a photomask company, have formed a collaborative program intended to improve the manufacturability and quality of advanced photomasks and reduce design-to-photomask cycle times, Synopsys said.
2004-03-29 Motorola expands use of Synopsys software technology
Motorola Inc.'s Semiconductor Products Sector (SPS) has expanded its agreement to license Synopsys Inc.'s phase-shift technology and mask synthesis software in order to apply the technology globally to its advanced 90nm silicon-on-insulator (SOI) semiconductor manufacturing process technology.
2006-09-20 Tool limits need for immersion lithography at 45nm
Invarium will roll out new patterning-synthesis software this week, promising, among other things, to limit the number of advanced layers that will require immersion at 45nm
2004-07-09 Synopsys to adopt Oasis IC layout data format in 2005
Claiming a leg up in EDA tools targeting design for manufacturing (DFM), Synopsys Inc. said it would stick with the venerable GDSII IC layout format until the first half of 2005 rather than adopt the more compact Oasis layout format created in 2003.
2004-10-07 Renesas standardizes on Cadence MaskCompose
Renesas Technology Corp. has standardized Cadence Design Systems Inc.'s MaskCompose for automated reticle design synthesis in its 90nm design flow
2003-10-21 Panelists, keynoter cite EDA interoperability roadblocks
Panelists explored EDA interoperability "hot buttons" at the Synopsys EDA Interoperability Developer's Forum held last October 16-17.
2004-09-01 41st DAC papers reveal vendors' R&D
The 970-page DAC proceedings for 2004 offer insights into R&D work underway at design automation vendors.
2006-11-01 Tool reduces need for immersion at 45nm
Invarium Inc. offers patterning-synthesis software promising, among other things, to limit the number of advanced layers that will require immersion at 45nm. This will allow customers to get more mileage out of existing lithography equipment
2015-12-29 Maxim rolls out 16bit 5.9Gsps modulating RF DAC
The MAX5869 is optimised for digital video broadcast and cable applications and meets spectral mask requirements for a broad set of communication standards
2013-12-02 KTH researchers develop interactive, social robot
With a computer-generated, animated face that is rear-projected on a 3D mask, Furhat can test various interactive technologies such as speech synthesis, speech recognition and eye-tracking.
2004-10-22 Synopsys OPC software increases HHNEC wafer yields
Synopsys Inc. revealed that Shanghai Hua Hong NEC Electronics Ltd (HHNEC) has adopted its Proteus optical proximity correction (OPC) software.
2004-05-14 Synopsys enhances SiVL verification tool
Synopsys has announced enhancements to its SiVL verification tool, a silicon-versus-layout tool.
2004-09-01 Synopsys CEO calls for DFM cooperation
Synopsys CEO called on the design and fab communities to develop
2013-01-25 Synopsys boosts uptake of FinFETs
The solution for FinFET-based designs includes various DesignWare Embedded Memory and Logic Library IP, silicon-proven design tools and foundry-endorsed extraction, simulation and modelling tools.
2001-05-01 Vendors should count silicon, not tapeout wins
Tapeouts are certainly important. But they are not an end unto themselves, but, rather a milestone on the way to the goal of working silicon.
2014-07-29 Utilising ASOS for the Internet of Things (Part 2)
The second instalment of this series focuses on creating the SynthOS project file, which is a text file defined by the user and has the name project.sop.
2005-02-09 Synopsys supports SUSE LINUX with verification platform
Synopsys Inc. will support the SUSE LINUX Enterprise Server 9 operating system (OS) from Novell on both 32bit and 64bit x86 instruction sets for Synopsys' Galaxy Design and Discovery verification platforms.
2008-03-17 Succeed at 65nm design
A true DFM-aware environment accounts for process variability and lithographic effects in the context of timing, power, noise and yield at every stage of the flow. This begins with the characterization of the cell library, continues through implementation, analysis and optimization, and ends with sign-off verification.
2002-06-12 Standards inch forward with skeptics in tow
Two standards efforts will take major steps forward at the 39th Design Automation Conference, as the OpenAccess Coalition announces four additional EDA vendor members and much of the EDA community lines up behind Accellera's new SystemVerilog standard.
2005-07-19 Speakers eye design-manufacturing link
Viable system-on-chip (SoC) business models require an integration of design and manufacturing, along with new types of businesses and alliances, according to several speakers at the Multi-Processor SoC (MPSoC) forum.
2002-11-18 SoC/IP designs need next-gen solutions for integration verification
As the cost of SoC design plus time-to-wolume pressure continue to rise, a next-generation simulator for SoC integration verification is required to ensure functionality.
2011-06-03 Singapore's A*STAR to develop 16Kbit RRAM
The development of a 16Kbit RRAM prototype and memory controller is being pursued under a strategic partnership between A*STAR's Data Storage Institute (DSI) in Singapore and 4DS Inc.
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