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2008-01-11 Cadence, Mentor launch Open Verification Methodology
A result of their joint efforts to unify the SystemVerilog method, Cadence Design Systems Inc. and Mentor Graphics Corp. ahs launched the Open Verification Methodology (OVM).
2008-02-19 Cadence, Mentor enhance OVM source-code library
Cadence Design Systems and Mentor Graphics have announced an enhanced release of the source-code library and user documentation for the Open Verification Methodology (OVM), claimed to be the industry's first open, interoperable SystemVerilog verification methodology.
2007-06-20 Autosar advances with triumph of Mentor-Volvo project
The success of the Autosar demonstrator project of Mentor Graphics Corp. and Volvo Trucks is driving forward the adoption of the standard in commercial vehicles.
2003-05-26 austriamicrosystems kit based on Mentor Graphics' design flow
The company has announced the extension of its design environment support that is based on Mentor Graphics' IC design flow.
2004-11-11 Atmel, Mentor expand agreement
Atmel Corp. and Mentor Graphics Corp. have announced a multi-year extension and expansion of an existing OEM agreement for advanced synthesis, simulation, and verification tools.
2006-06-22 ATI picks Mentor's tester for 90nm processors
Mentor Graphics announced that its TestKompress embedded deterministic test tool has been implemented by ATI Technologies.
2002-10-31 Arrow Electronics solution to feature Mentor Graphics e-database
The Global Information Business, a business unit of Arrow Electronics Inc., has joined the ADAPT program of EDA company Mentor Graphics Corp.
2004-09-24 Ansoft tool links to Cadence and Mentor
Ansoft said the latest version of AnsoftLinks tool streamlines data flow from EDA vendor software to it's products.
2003-01-30 AMIS signs access agreement for Mentor Graphics IP
AMI Semiconductor has licensed Mentor Graphics Corp.'s Inventra IP solutions to provide its customers a wide range of design options.
2004-09-27 Altera kit empowers engineers using Mentor tool
Mentor announced the availability of the Altera Stratix GX design kit for ICX
2003-01-13 Alcatel plant standardizes on Mentor design tools
Mentor Graphics Corp. has announced that Alcatel's Raleigh, North Carolina site has chosen the Mentor Graphics Board Station PCB design suite to standardize its design flows and methodologies.
2007-05-11 Agilent, Mentor team on automotive network design
Agilent Technologies announced a partnership with Mentor Graphics, under which Agilent will license certain products in the Mentor Volcano product line to help automotive engineers develop electronic products faster and under budget while meeting quality requirements.
2005-11-10 Agilent, Mentor claim to speed high-volume 'yield learning
Agilent Technologies Inc. and Mentor Graphics Corp. Monday (Nov. 7) announced an integrated solution enabling high-volume diagnosis for logical and physical failure analysis
2004-08-27 Actel, Mentor improve FPGA synthesis
FPGA vendor Actel and Mentor Graphics have announced the latest version of Mentor's Precision RTL synthesis tool, providing what they said is an 18-percent performance improvement in Actel's ProASIC Plus FPGAs.
2004-08-31 Actel, Mentor improve FPGA synthesis
Actel and Mentor Graphics have announced the latest version of Mentor's Precision RTL synthesis tool, providing performance improvement in Actel's FPGAs.
2007-01-24 Actel, Mentor expand OEM partnership
Mentor Graphics and Actel announced the signing of a new OEM agreement between the two companies, expanding the companies' existing technology and marketing partnership.
2004-09-30 AccelChip links to CoWare, Mentor tools
AccelChip Inc. said it has teamed with SystemC tool vendor CoWare Inc. and, separately, with Mentor Graphics to provide advanced design and verification flows for DSP design.
2007-11-26 65nm RF design kit rolls from Mentor Graphics, TSMC
A design kit that allows 65nm mixed-signal and RF process technology has been announced by Mentor Graphics and TSMC.
2008-06-19 1.6B Cadence buyout offer not enough, Mentor says
Cadence Design Systems Inc. has submitted a buyout proposal to Mentor Graphics Corp. June 17 but industry observers believe that Cadence is unlikely to get the company on its current terms notwithstanding the double-digit premium it is willing to pay.
2006-05-16 Writing good C++ code for embedded applications
Embedded-software technology appears to lag behind new trends. Colin Walls enumerates the dos and don'ts for writing a good C++ code for embedded apps.
2006-10-10 VSIA forms verification IP quality workgroup
VSIA has formed a quality workgroup to create a verification IP quality worksheet that will address the challenges facing designers as they evaluate and implement standard verification IP components.
2002-03-11 Verification tool enables rapid ASIC prototyping
Designed for creating ASIC and SoC prototypes using off-the-shelf FPGAs, the SpeedGate Direct System Verification environment addresses all hardware prototype creation and verification challenges.
2001-06-15 Using team design for large FPGAs
This application note describes how to perform team design optimization (such as Virtex) for large FPGAs.
2006-11-01 Topology router goes into auto mode
A breakthrough technology from Mentor Graphics puts autorouting on a par with manual PCB layout.
2006-08-02 Tool suite supports Freescale ColdFire cores
Mentor Graphics has announced that its Eclipse-powered EDGE IDE and debugger now supports Freescale's ColdFire family of microprocessors and microcontrollers.
2005-03-11 Tool offers interconnectivity
Accelerated Tech announced an application-level tool that enables high-speed communications between two or more processors running on the same chip, computer or over a network.
2003-01-02 Time to gag the lawyers
Richard Goering discusses the never-ending EDA lawsuits of companies over old technology and how it has hindered the development of anything new in the industry.
2000-05-01 Testing designs containing embedded blocks
Deep-submicron processes enable increased complexity, which means that many of the embedded blocks cannot be tested using traditional methods. You must find new solutions to avoid risking product quality.
2006-12-18 Test tool optimizes data for IC yield
LogicVision Inc. touts its solution Yield Insight to provide "yield learning," a process in which test failure data can pinpoint potential yield problems.
2006-05-01 Test takes new role in yield improvement
New test methodologies focusing on identifying failure mechanisms provide a valuable feedback link to help you gauge success in product development.
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