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2004-02-27 System design tool offers production release
Mirabilis Design has introduced the first commercial version of VisualSim, its system-level performance-modeling software.
2006-09-18 Re-thinking SoC design at 65nm, below
Executives from major IC houses and EDA companies have been talking about the design challenges facing developers as SoC designs move from 65- to 45- and 32nm
2005-09-27 Modeling, design environment topples SystemC simulator limits
VisualSim SystemC Modeler from Mirabilis Design Inc. couples the OSCI-compliant SystemC v2.1 simulator to the core of the company's VisualSim simulation engine.
2006-11-08 Mirabilis toolkit generates Xilinx FPGA platform models
Mirabilis Design announced immediate availability of the new VisualSim Xilinx FPGA Modeling Toolkit that enables quick prototypes of new and derivative systems using parameterized models of FPGA platforms.
2003-10-07 Startup tackles system architecture
Mirabilis Design Inc. is quietly shipping a toolset for performance analysis and architectural exploration.
2006-03-16 Primitive tools slow analog/digital integration
With the right tools, the job of integrating high-performance A/D circuits on the same SoC could be easier.
2004-12-01 Scripting language uses small instruction set
Mirabilis Design's SmartMachine uses only 10 instructions to describe complex models in a few lines of code.
2009-07-21 Platform enables Android performance analysis
Mirabilis Design Inc. and TOPS Systems Corp. have jointly introduced the Android on VisualSim architecture exploration platform for hardware-software architecture exploration as well as power and performance analysis of consumer devices.
2003-12-01 Startup tackles system architecture
VisualSim, a toolset for performance analysis and architectural exploration using the Ptolemy simulation kernel, offers to combine DSP, analog, protocols and digital architecture in a single simulation.
2013-09-10 Choosing the right RTOS scheduling algorithms
Learn how to do away with the need for a full RTOS implementation by using a hardware/software system modelling tool to build a dedicated scheduler.
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