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2003-09-16 SVP is key technology for nanometer IC design
Examine the importance of chip-level architectural issues and the need for physical hierarchy for multi-million gate nanometer SoC design.
2004-05-14 Silicon modeling in the nanometer era
With 90nm in production and 65nm on the horizon, designs face increasing challenges: finer line widths, longer interconnect, more routing layers and more analog content.
2012-02-10 Samsung, Cadence partner in nanometer SoC design
The companies will collaborate on a design-for-manufacturing (DFM) infrastructure to tackle physical signoff and electrical variability optimization for 32, 28 and 20nm ICs.
2007-06-18 Rethinking DFT strategies in nanometer designs
As the industry races to the 90nm and 65nm nodes, manufacturers are exploring more advanced tests, a 'complete' solution with the most advanced test patterns and fault models needed to improve defect detection.
2007-05-24 New UMC R&D lab zeroes in on advanced nanometer tech
UMC has opened a new R&D lab in Southern Taiwan focusing on advanced nanometer technologies for 300mm manufacturing.
2013-08-20 Nanometer device improves optical sensing
A*STAR researchers proposed a novel approach to 'superlens' systems that can surpass the classical limit of focusing light.
2005-03-18 Nanometer age R&D costs a concern, says TI's Stork
Research and development costs are outpacing the growth of semiconductor industry revenue by about 4 percent per year, which could squeeze innovation in coming years, a leading technologist said Monday (Mar. 14).
2008-08-07 Motion controllers facilitate sub-nanometer resolution
Providing sub-nanometer position resolution without compromising speed or throughput, ACS Motion Control's advanced SPiiPlus and MC4U multi-axis motion controllers feature a Sin-Cos encoder multiplier that enables accurate, high-resolution positioning while reducing jitter and settling times.
2007-02-12 Managing electromigration at the start of nanometer designs
As reliability becomes more difficult to achieve in nanometer designs, it is no longer enough for designers to toss the issue of electromigration over the wall.
2005-06-08 LogicVision product to address nanometer design challenges
LogicVision announced an embedded test solution to tackle the increasingly difficult challenges associated with nanometer design and test
2006-05-24 IBM probe nanometer-scale memories
IBM has taken the wraps off a groundbreaking project to develop terabit memories based on MEMS technology and referred to as "probe-based storage."
2004-10-18 Growing challenges in nanometer timing analysis
By including nanometer effects, advanced timing analysis methods deliver the precision needed to accurately predict performance and avoid costly silicon iterations.
2002-05-01 Full-chip verification for building nanometer memories
Verification tools can greatly facilitate memory design, where designers face a combination of evolving circuit complexity and increasing size in dealing with massive memory arrays.
2006-07-18 DRC tool meets yield challenges of nanometer era
Mentor Graphics said its Calibre nmDRC tool redefines the traditional design rule checking (DRC) step to solve the yield challenges of the nanometer era.
2004-10-20 DongbuAnam relies on Magma for nanometer designs
DongbuAnam Semiconductor has standardized Magma Design Automation Inc.'s SiliconSmart CR and SiliconSmart IO characterization and modeling technology.
2003-09-16 Design challenges and sign-off criteria in nanometer era
In nanometer era, traditional STA and physical verifications are no longer sufficient. The nanometer sign-off flow must comprise SI-validated analysis engines that account for the interactions of multiple-noise sources.
2002-08-22 Cadence, UMC to launch manufacturable nanometer design
Cadence Design Systems Inc. and UMC have collaborated to help customers facilitate the transition to fabrication through physical design verification, using Cadence's technology for nanometer designs.
2002-08-21 Cadence launches Asian symposium on nanometer technology
Cadence Design Systems Inc. has slated the first annual Asia Cadence Technology Symposium (ACTS) for its customers in the Asia-Pacific region.
2005-11-16 Anticipating nanometer design issues
Manage a growing array of issues arising from the use of nanometer process technology and subwavelength lithography.
2006-09-18 Address SI issues in nanometer IC design
In its truest sense, signal integrity helps ensure that a signal can faithfully propagate to its intended destination with the right logic value within an allocated time.
2010-06-15 'Entangled' LED exhibits nanometer-scale quantum dot
Toshiba Research Europe Ltd and the Cavendish Laboratory of the University of Cambridge scientist have developed a light source dubbed Entangled LED.
2002-01-15 Xidian University establishes nanotechnology R&D center
Xidian University has established an R&D center on nanotechnology.
2012-08-01 Verios SEM boasts precise measurements at 22nm or below
System delivers powerful resolution and contrast for precise measurement of sensitive materials in semiconductor and materials science applications.
2007-06-27 TSMC qualifies Magma Quartz tech for 65nm, 0.13?m
Magma Design Automation Inc. announced that Taiwan Semiconductor Manufacturing Co. has qualified Quartz RC extraction technology files for 65nm, 90nm and 0.13?m designs.
2008-03-03 Team up to win the yield game in the nm era
Designers and manufacturers are two sides of the same team, sharing a common goalyield. To win out, they need to align their strategies, their skills and their knowledge, and work together to overcome the challenges. That's the way the game is played in the nanometer era, says Anthony Nicoli of Mentor Graphics.
2011-07-21 TCNL fabs ferroelectric nanostructures on plastic
Georgia Tech researchers have developed a way to fabricate nanometer-scale ferroelectric structures directly on substrates.
2007-03-16 Stir manufacturing into design effectively
Semiconductor companies looking to maximize yield will need to deploy more effective methods to account for manufacturing effects early in IC development.
2006-08-16 Statistical timing revs for 45nm era
Statistical-timing analysis may represent the next major technology shift in nanometer IC implementation, but it's going nowhere fast without statistical-timing models.
2004-06-01 Startup takes a novel design-for-yield approach
Anchor Semiconductor says it offers the market's first silicon design-rule-checking tool.
2006-09-18 Spice tools rev speed, accuracy
Berkeley Design Automation released in August two products that claim to speed Spice simulation by five- to tenfold while preserving full Spice accuracy.
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