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2013-05-28 Annular electrodes as PCM solution (Part 2)
Learn about the possible advantages and limitations offered by nanotechnology and self-assembly techniques.
2013-03-18 'Liver-on-chip' designed to predict drug toxicity
The A*STAR Institute of Bioengineering and Nanotechnology's 'liver-on-chip' device can be used to screen the liver's capacity to process different drugs and other compounds.
2004-03-16 Zinc-oxide structure joins nanoscale-device push
Nanorings, a new type of geometry in the quest to build nanoscale devices, hold out near-term promise as injectable pressure sensors to monitor the human body.
2016-03-30 Wearables require technology, logistics collaboration
The booming wearable technology industry requires semiconductor makers to work with experienced and reliable logistics providers that can offer multimodal transportation and properly ship items.
2014-05-14 Wearable supercapacitor chalks up high energy density
The device packs a network of graphene and carbon nanotubes, storing energy comparable to thin-film lithium batteries. It has volumetric energy density of 6.3microwatt-hours per cubic millimetre.
2003-07-15 Visionaries see flexible computers using less power
Computers will be more flexible, intelligent, and require less power by the end of the decade.
2015-06-02 USB technology in a battery-powered IoT era
Here's a look at how the USB standard has evolved to a state-of-the-art technology that allows even small battery-powered devices for the IoT to communicate with anything.
2007-11-22 Up close and personal with Intel's 45nm high-k guys
Three Intel researchers who were part of the team behind the 45nm high-k metal gate breakthrough talk about the highs and lows of the project and what motivated them to press on and move on to more challenging endeavors.
2015-10-27 Understanding the barriers restricting computing progress
A report based on a workshop funded by SRC and NSF describes some issues impeding improvement in computing such as energy consumption and inadequate architecture.
2012-08-30 Ultrathin lens eliminates optical aberrations
Applied physicists at the Harvard School of Engineering and Applied Sciences created a 60nm flat lens that focuses light without imparting the distortions of conventional lenses.
2014-04-24 Ultracapacitors get storage boost from graphene, nanotubes
George Washington University researchers combined graphene flakes with single-walled carbon nanotubes to develop an ultracapacitor that boasts a capacitance value three times higher than that of a device made from carbon nanotubes alone.
2003-03-24 U.S., tech industry mull creation of mask consortium
The U.S. government, photomask companies and several semiconductor makers are reportedly in the final stages of forming a research consortium to help overcome the technical and economic difficulties associated with deep-submicron mask design.
2011-06-07 U.S., Russia collaborate on a smart grid program
U.S. and Russia have entered into a partnership program, which aims to deepen its collaboration on energy efficiency, smart grid technology, and clean energy.
2005-09-13 U.K. academics invent form of "spintronic" logic
Researchers from Imperial College London, Durham University and the University of Sheffield have developed a technology they have named "magnetic domain-wall logic", which they claim could enable data storage and processing at higher density than conventional microelectronics.
2011-02-04 Tyndall scientists create n-type junctionless transistor
With a 50nm channel length and a cross-section of about 8nm x 12nm, the new junctionless transistor is 30 percent more energy-efficient and could represent simpler manufacturing processes for transistors.
2009-11-19 Toshiba touts EUV photoresist for 20nm process
Toshiba Corp. has developed a photoresist suitable for use with EUV lithography and proved its viability in the first 20nm generation process technology.
2004-02-03 Three firms partner for memory chip development
Infineon Technologies North America, Genus Inc. and Albany Nano-Tech (ANT) have signed a three-year partnership program worth $12M to develop next-gen chip memory devices.
2006-07-17 They're not the Valleyand that's the point
Silicon Valley is no longer the end of the rainbow for companies in search of R&D talent, advanced research opportunities, submicron-process expertise or applications development prowess.
2008-11-18 Telescopic nanotubes work on RAM-flash fusion
Researchers believe they can combine the high-speed of RAM with the non-volatility of flash by using telescopic nanotubes.
2004-04-19 Tegal, Sharp partner nano layer deposition development
Tegal Corp. and Sharp Laboratories of America have entered into an agreement to collaborate on a focused joint development program (JDP) to accelerate the adoption and integration of next generation high-K dielectrics.
2010-09-16 Tech museum unveils revolutionary Silicon Valley innovations
The Tech Museum has just unveiled its most ambitious exhibition yetthe 3,000-sq. ft. Tech Silicon Valley Innovation Gallery.
2006-08-16 T.J. Rodgers on politics and nano
EE Times caught up with Cypress Semiconductor founder and CEO T.J. Rodgers at the Embedded Systems Conference.
2003-10-09 SUSS announces new wafer bonding technology
SUSS MicroTec AG has introduced a method of surface activation and wafer-to-wafer bonding referred to as the nano PREP.
2009-06-26 Supercomputer gets super water-cooled
Swiss Federal Institute of Technology Zurich and IBM plan a cutting-edge water-cooled supercomputer.
2004-07-02 STMicro's Pistorio takes lead role in European nano initiative
Pasquale Pistorio, outgoing president and CEO of STMicroelectronics, will serve as chairman of a technology group within a new European initiative called Eniac.
2010-06-28 Stanford top engineer weighs in on CMOS outlook
EE Times recently sat down with James Plummer, dean of Stanford's school of engineering, for a wide ranging interview on the outlook for CMOS, engineering, education and globalization.
2002-12-20 Stanford advanced nano facility to house FEI systems
Stanford University has established an advanced nanocharacterization facility in collaboration with FEI Co.
2003-02-14 Stan Shih to drive Taiwan's industry by cultivating talents
Acer Foundation has announced a strategic alliance in Taiwan to cultivate world-class talents in analog and mixed-signal circuit designs, with an emphasis on SoC designs.
2011-05-31 SPTS, Griffith University to develop SiC-on-Si wafers
A joint agreement has been forged between SPTS and Griffith University for the commercial development of SiC-on-silicon wafers as viable semiconductor material for LED, power and MEMS devices.
2014-08-12 Spintronics to optimise electronic devices
Unlike other concepts that harness electrons, spin current can transfer information without causing heat from the electric charge, which is a serious problem for current semiconductor devices.
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