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2015-05-12 Impact of piling on package manufacturing
To accomplish various performance enhancements, packaging engineers should consider intriguing combinations being constructed at the chip to package level
2005-04-22 Voltage divider in SOT-23 package eases board routing and layout problems
TT Electronics BI Technologies Electronic Component Division has developed a SOT-23 packaged precision voltage divider network for aerospace, industrial, military and medical industries.
2008-03-12 Thermal considerations for a UCSP package
This application note discusses the power-dissipation capabilities of the UCSP package, and how that package can limit dissipated output power compared to other package options
2005-05-20 Tessera signs substrate pact with Japanese board company
Tessera Technologies Inc. announced that it would expand a business and technology relationship with Japanese pc board technology supplier North Corp. to develop and make available advanced substrate technologies for next-generation electronics
2003-07-16 Substrate noise can tax tools, methodologies
Raminderpal Singh, manager of Process Design Kit Development at IBM, says complex substrate-modeling, prediction methodologies and tools can all prove futile in IC design without understanding the "bigger" parasitic future
2002-07-08 STATS rolls out advanced version of EBGA package
ST Assembly Test Services Ltd has introduced its latest thermal array product, the Enhanced Ball Grid Array Build Up (EBGA-A) package, an advanced version of the traditional EBGA package
2004-01-22 STATS offers FCLGA package for wireless apps
ST Assembly Test Services Ltd has qualified an environment-friendly version of its Flip-Chip Land Grid Array (FCLGA) package
2002-08-26 STATS EBGA package offers more I/O
STATS Ltd. has launched the EBGA Multi-Tier package that offers higher I/O and multiple wire bonding zones for power, ground, and signal connection
2005-06-23 Stacked package from Sharp allows 0.5-mm grid
Sharp Corp. has developed packaging technology that allows stacking of multiple packages with 0.5mm pitch ball grids, which the company claims is the industry's tightest pitch.
2010-07-15 Soldering recommendations for the ceramic vertical mount package
This application note describes soldering recommendations for the ceramic vertical mount package (CVMP). The CVMP can be mounted either vertically or lying flat
2008-05-01 Partition and package to miniaturize handsets
Designers are turning to system-in-package, 3D IC stacking and wafer-level packaging to enable the acute miniaturization found in handsets, particularly for RF functions
2003-06-06 NEC semiconductor package <1mm thick
NEC Corp. and NEC Electronics Ltd. announced that they have developed a MLTS as well as a semiconductor package to support it
2014-06-09 Molex touts plastic substrate interconnect for CoB arrays
With a low overall package height of about 2mm, Molex PSI boasts a slim design for space-limited applications while minimising substrate costs.
2005-10-17 Implement stacked package-on-package designs
Companies must adopt PoP standards to better plan product road maps and facilitate the adoption of new applications
2005-07-18 Implement component partitioning for system-in-package apps
SiP alternatives need broader supplier collaboration on system-partitioning decisions within the electronics food chain.
2012-10-29 Imaging BGA package at multiple depths
Understand how to come up with a slide show of acoustically visible features at increasing depths.
2005-04-28 IC substrate suppliers ramp up CSP production
Taiwan chip substrate suppliers are increasing capacities for chip scale package (CSP) substrates as demand for Window ball-grid array (BGA) packaging services surge, which is mostly attributed to DRAM makers now shifting from DDR to DDR2.
2015-07-03 Examining 3D embedded substrate power packaging
Here is a look at 3D embedded substrate power packaging technologies, which will be increasingly deployed in everything from cell phones to hybrid electric vehicles
2015-03-05 Embedded die in substrate shows promise in processing tech
Yole Dveloppement revealed that embedding die in laminate substrates is a promising packaging principle, but it has to overcome several challenges, which include the supply chain.
2015-07-30 Diamond substrate unleashes GaN potential
Diamond substrates and heat spreaders enable GaN devices to operate near its peak power output without degradation in lifetime.
2008-10-01 Chip package options abound
When creating a new IC, device packaging is often overlooked until the end of process. However, choosing the right package can reduce time-to-market and create tangible benefits for customers. Here is a look at some of the available options and what they have to offer
2008-08-27 Cadence tool steps up IC package, SiP designs
The release of SPB 16.2, due in November of this year, from Cadence Design Systems, delivers advanced IC package/system-in-package miniaturization, design cycle reduction and DFM-driven design, along with a new power integrity modeling solution
2005-07-13 Actel makes LGA package available to RTAX-S FPGA offering
Actel disclosed that it has expanded its package selection to include a Land Grid Array option for its RTAX-S FPGA family
2001-04-20 Innovative mounting techniques enhance thermal performance of the surface-mount D3Pak Package
This application note is intended to compare the thermal performance of various mounting methods for the D3PAK including classic SMD PCB mounting, insulated metal substrate (IMS) mount down, etc
2013-01-16 LED packaging to experience year upswing, says Yole
According to Yole Dveloppement's latest report, the LED packaging materials market will enjoy a 20 per cent CAGR during the period 2012-2017, with its growth driven by package substrate and phosphors.
2015-03-09 IoT drives chip packaging innovation
The need for high performance multi-functional devices in a single package is pushing the industry to innovate in multi-chip packaging. This high level of integration has presented huge challenge
2006-01-25 Flip-Stack packaging supports wirebond-to-flip-chip transition
Amkor announced the Flip-Stack package solution that is specifically designed to support emerging transition from wirebond to flip chip interconnect for high-performance DSPs, ASICs and RF chips
2010-12-02   Xradia demos semicon failure analysis solutions at Semicon Japan
Xradia Inc.'s 3D X-ray solutions make it possible to visualize buried problems without destroying the package, or inducing artifacts that have nothing to do with the actual condition of the package
2008-11-21 Wafer-level packaging achieves prominence
Wafer-level packaging, the fabrication of the IC package directly on the wafer, is finally getting exposure after many years of promises, according to an expert in the field
2014-09-18 Understanding plastic ball grid array
Learn about the Plastic Ball Grid Array or PBGA package, a cavity up laminate based substrate package in which the die is attached to the substrate in the normal die up manner.
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