Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Advanced Search > packaging and testing

packaging and testing Search results

?
?
total search319 articles
2011-04-11 TSMC enters chip-packaging arena
TSMC will soon open a bumping facility and offer silicon interposers and TSV technologies for 3D chips, but will remain focused on the foundry market and will not compete against subcontractors
2014-12-17 Packaging and testing industry trends from 2013 to 2014
In 2014, the output value of OSAT industry is seen to grow by 8.4 per cent and the advanced packaging industry is expected to increase by 10 per cent
2003-06-16 OSE, Winstek collaborate for high-end IC testing
Orient Semiconductor Electronics, an IC packaging and testing firm, has partnered with IC testing firm Winstek, to increase its testing capabilities.
2005-12-27 IC packaging providers upbeat
Continued strength in the IC packaging and test sector during the fourth quarter and possibly beyond has prompted an investment banking firm to raise its estimates for Amkor, Siliconware and STATS ChipPAC
2005-07-08 IC packaging and testing companies expect high revenues in Q3
Most IC packaging and testing companies in Taiwan are anticipating significantly higher revenues in the second half of the year, as increasing demand has shown signs of market potential in June.
2006-05-02 IC design companies press for lower testing, packaging quotes
Despite strong demand for foundry services by IC design companies, they are withholding orders for testing and packaging services in a bid to pull down prices, according to industry sources.
2004-04-28 Greatek to acquire new IC-packaging equipment
Greatek Electronics Inc. will invest NT$120 million ($3.64 million at NT$33:$1) to acquire new wire bonders, testers and back-end equipment for its IC-packaging lines this year
2009-02-17 Chip packaging houses in red, too
Like the silicon foundries, IC-packaging houses are also seeing red ink
2007-01-03 Back-end memory testing could tighten in '07, says analyst
The back-end memory testing industry may become tighter in the second half of 2007, as memory packaging and testing companies struggle to keep pace with a changing and rapidly growing market.
2004-02-09 ASE to acquire IC packaging, testing operation from NEC
NEC Electronics Corp. and ASE Inc. have announced a strategic partnership for an IC backend manufacturing services deal
2002-08-01 ASAT to provide packaging solutions to Honeywell
ASAT Holdings Ltd will provide packaging and testing solutions for Honeywell's RF/microwave product family.
2012-02-03 Advances in 3D-IC testing
Read about the design-for-3D-test architecture and implementation flow developed by researchers at Industrial Technology Research Institute based on the Synopsys test solution
2007-01-22 UTAC: China testing, packaging industry yet to mature
Singapore's United Test and Assembly Center said that mainland China's IC testing and packaging industry still lacks market potential despite having Taiwan-based companies transfer their business to the region.
2008-05-01 Partition and package to miniaturize handsets
Designers are turning to system-in-package, 3D IC stacking and wafer-level packaging to enable the acute miniaturization found in handsets, particularly for RF functions
2014-12-22 Experimental methods for PCB design and manufacturing
EMS providers are being called upon to take on the task of design of experiments, also known as experimental designs, requiring them to work with OEMS to do the necessary research and development
2015-07-15 E-band cost, reliability concerns in MMIC packaging
Traditional semiconductor packaging approaches either cost too much or suffer from signal integrity issues. However, new techniques are becoming available that can address these problems
2002-12-06 ASE rolls out packaging technology for RFICs
Advanced Semiconductor Engineering Inc. has introduced a QFN packaging solution
2010-09-17 Verigy bags SEMI's 1st advanced testing innovation award
Verigy, has won Semiconductor Equipment and Materials International's (SEMI) first Advanced Testing Innovation Award
2005-09-01 Packaging becomes problem-solving tool
Package technology provides improved electrical and thermal performance for today's single-die power products
2005-04-13 Oscillators tune high-speed networking, server, and storage apps
Operating at 2.5Vdc or 3.3Vdc, with LVCMOS clock frequencies from 100MHz to 160MHz, the devices are optimized to lower customer costs while meeting the demanding performance and reliability criteria of high-speed networking, server, and storage applications
2007-02-06 NXP, ASE to build testing and packaging center in China
NXP Semiconductors and Advanced Semiconductor Engineering will form a joint venture in Suzhou, China focused on semiconductor testing and packaging for mobile communications, consumer electronics and automotive products.
2008-01-10 New packaging tech integrates cooling, power generation
Nextreme has integrated cooling and power generation into the copper pillar bumping process used in high-volume electronic packaging
2008-08-12 Mitsubishi electric vehicles cruise to SCE for testing
Mitsubishi Motors Corp. has signed a letter of intent with Southern California Edison (SCE) to forge a unique collaboration for testing and evaluation of the new i MiEV electric vehicle
2003-10-03 Life-long testing prescribed for chips
Chip testing strategies continue to perplex the industry as sub-100nm node designs become more commonplace
2012-08-09 Improve SoC yields with diagnostic and repair tools for embedded memory
Learn about embedded memory test solutions, including fault detection in very deep submicron technologies, repair at the manufacturing level, as well as diagnosis for process improvement and field repair capabilities
2006-04-10 IMEC presents 'bendy' packaging for ICs
Leading European research institute IMEC and the Intec laboratory at the University of Ghent have developed a process to produce ultra-thin flexible packaging for ICs
2012-01-19 IC market to tug chip packaging, testing sales
For Q1, testing and packaging firms forecast a dip in sales from 5-10 percent, although a rebound is forecast for Q3.
2011-03-10 Flip chip packaging boasts 40% lower cost
STATS ChipPAC releases a flip chip packaging technology, fcCUBE, that boasts high input/output density, high performance and reliability in advanced silicon nodes
2007-10-25 EDA's big three unready for 3D chip packaging
Without design tools to allow exploration and tradeoffs to be made in 3D layouts, engineers are restricted to design in two dimensions and occasionally stack chips crudely. But without a clear market for 3D design EDA vendors are unlikely to offer tools
2005-07-19 Chipmos receives SOC packaging patent from MOEA
Chipmos Technologies Inc. (Chipmos Taiwan) has been granted a patent entitled "substrate-on-chip (SOC) packaging process" (Invention No. 207525) by the Intellectual Property Office of the Ministry of Economic Affairs (MOEA) of Taiwan
Bloggers Say

Bloggers Say

See what engineers like you are posting on our pages.

?
?
Back to Top