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2002-07-19 Amkor, IBM partner on flip-chip technology offerings
Amkor Technology Inc. and IBM have agreed to collaborate on the design and production of flip-chip substrates and packaging.
2004-03-26 Amkor, Casio join forces on wafer-level packaging
Amkor Technology Inc., Casio Computer Co. Ltd and Casio Micronics Co. Ltd have established business and technology licensing agreements for assembly and test of wafer-level semiconductor packages, commonly known as WLP
2012-05-24 Amkor puts up $350M packaging facility
Amkor Technology is set to build a test and packaging facility in South Korea’s Incheon Free Economic Zone that will focus on design, development and production of semiconductor packaging and test services.
2003-01-09 Amkor memory card packaging cuts cost in half
Amkor Technology Inc. has developed what it claims to be the industry's first leadframe-based memory for use in portable, handheld apps
2003-04-08 AMD adopts Unitive wafer bumping technology
Advanced Micro Devices Inc. has signed Unitive Inc. to provide its proprietary electroplated wafer bumping technology for AMD's microprocessor chipsets assembly process
2008-09-05 Alchip taps Sony Semi's packaging tech for ASICs
Open foundry ASIC provider Alchip Technologies Inc. has selected Sony Corp.'s Semiconductor Group to be their package partner in advanced SoC ASIC solutions for its worldwide customers.
2006-12-06 AIT granted leadframe technology patent
Advanced Interconnect Technologies was granted U. S. patent number 7,129,116 for developing a process for the manufacture and use of partially patterned leadframes with near-chip scale packaging lead-counts
2003-12-05 Agilent to package, manufacture OEwaves technology
Agilent Technologies' facility in Boeblingen, Germany, has been selected by OEwaves Inc., to package and manufacture the latter's patented fixed-tuned optoelectronic oscillators.
2004-03-31 Agere devices reduce RF transistor packaging costs
Agere Systems has announced five RF overmolded plastic packaged transistor products that will lower the overall costs of wireless basestation amplifier equipment.
2012-10-24 Advances in wireless bonding LED technology
Know how this LED technology provides greater brightness, superior heat dissipation and enhanced durability, while maintaining small footprints
2002-04-15 Advanced Technology chip resistor has low temperature coefficient
The RC-02 chip resistor from Fenghua Advanced Technology features a temperature coefficient of 100, allowing it to operate over the -550C to 1250C temperature range. It is also suitable for portable electronics applications
2014-08-11 Advanced packaging drives SPTS buyout
Orbotech, a provider of optical inspection equipment for PCBs and flat-panel displays, acquired SPTS, a semiconductor etching and deposition company, for $300 million.
2002-01-15 ACE Technology to open wafer plant
Advanced Chip Engineering Technology Inc. (ACE Technology)'s newly established 28,000-square-meter plant is scheduled to begin mass production this week
2012-09-17 A*STAR, Hitachi Chemical team up on 3D IC packaging tech
Hitachi Chemical hopes to leverage IME's advanced 3D IC process capabilities to enhance material technologies that can support the demanding requirements of thin wafer processing.
2013-07-10 A*STAR IME consortium delve into advanced packaging
A*STAR IME and a group of semiconductor firms have teamed up to address reliability and performance issues in packaging solutions for compact sized consumer electronics and high power electronics
2002-08-30 Ziptronix technology simplifies MEMS processing
Ziptronix has introduced a room temperature, foundry-based, wafer-scale method of hermetically encapsulating surface sensitive devices using industry-standard tooling, materials, and process chemicals.
2003-11-11 Toshiba MOSFETs feature full isolation packaging
Toshiba Corp. has developed a family of medium- to high-voltage, power MOSFETs that allows high speed switching with faster turn-off time.
2000-06-06 Plastic Packaging and the Effects of Surface-Mount Soldering Techniques
This application note is intended to inform and assist the customers of Microchip Technology Inc. with Surface Mount Devices (SMDs
2007-04-23 Next-generation NVSRAM technology products
This article takes a look back at the first NVSRAM devices, describes the improvements made that led to the current generation of parts, draws a comparison with existing technologies, and concludes with an overview of the key application areas.
2006-02-01 Green semiconductor packaging: Addressing the environmental concerns of the 21st century
No development can proceed without closely examining the environmental impact of using a product and its compliance with global environmental regulations.
2008-02-07 GaAs MMIC packaging uses surface-mount tech
Mimix Broadband Inc. introduced surface mount technology (SMT) packaged, GaAs monolithic microwave IC receiver and transmitter devices that cover the 35-45GHz and 36-42GHz frequency bands
2006-01-25 Flip-Stack packaging supports wirebond-to-flip-chip transition
Amkor announced the Flip-Stack package solution that is specifically designed to support emerging transition from wirebond to flip chip interconnect for high-performance DSPs, ASICs and RF chips.
2001-08-01 Few-chip packaging: An MCM renaissance
Kevin Rinebold explains how FCP is a more attractive risk management strategy than SoC for combining IP from multiple sources or mixed semiconductor technology
2001-07-01 EMI vs. IC technology
Discover in this article the package characteristics you should look for when selecting ICs for your next design.
2002-07-30 ASE develops fine pitch wire bonding technology
Advanced Semiconductor Engineering Inc. has completed the development of tri-tier wire bonding technique that will enable ICs to have smaller areas and denser I/Os.
2002-08-19 Amkor qualifies Strand substrates for leadframe packaging
Amkor Technology Inc. has qualified Strand Interconnect's SiliconMate substrates for its MQFP family of leadframe packages
2008-06-16 WLCSP assembly guidelines
This application note by Dennis Lang recommends a starting point for manufacturing process optimization using Fairchild Semiconductor wafer level chip scale packaging (WLCSP) components
2012-05-03 TriQuint slashes workforce
We are rightsizing our factories in Florida and Costa Rica as we transition to [wafer-level packaging] and away from commodity duplexers toward a higher-value mix of products,' said Ralph Quinsey, TriQuint's president and CEO
2010-07-09 TI turns to pillar flip-chip for 45-/40nm node
Texas Instruments Inc. is embracing an emerging technology called fine-pitch copper pillar flip-chip packages for devices at the 45-/40nm node and below
2016-03-15 The endless pursuit of smaller packages
In this article, we explore the creativity in semiconductor package integration, while anticipating the release of the Samsung's Galaxy S7 and the iPhone 7.
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