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2005-05-04 Switch with low parasitic capacitance
The HV238 from Supertex is a 220V 16-channel high voltage analog switch IC with output bleed resistors.
2013-06-06 Parasitic extraction in the double-patterning age
Determining the impact of double-patterning on electrical sign-off can be better achieved by understanding how PEX tools have evolved to handle this challenge.
2015-06-16 Grasping parasitic extraction of FinFETs
Memory chips must meet strict specifications for fast data transfer, reliability, and power consumption, so accurate characterisation is necessary at every stage of design.
2016-04-05 CAD tool for capacitance extraction in image sensor designs
Silicon Frontline Technology released the F3D field solver that allows capacitance extraction of complex 3D large-area structures such as pixels, arrays and precision analogue circuits
2004-09-21 Vishay capacitor's new case size reduces parasitic inductance
Vishay Intertechnology released what it claims as the industry's first silicon-based surface-mount RF capacitor available in the 0603 case size.
2005-06-09 ST Micro balances line capacitance, attenuation in new chips
The two new low-capacitance EMI-filter and electrostatic-discharge protection chips from STMicroelectronics are designed to suppress EMI/RFI noise in sensitive, high-volume equipment
2011-02-03 Solutions model to latest 28-nm parasitic effects ratified
Synopsys collaborates with IMTAB members of IEEE-ISTO to ratify extensions to its Interconnect Technology Format, enabling parasitic extraction tools at 28nm and below process technologies
2004-09-17 Parasitic extraction solution with new resistance, capacitance engines
Mentor disclosed that it has enabled the industry's most accurate simulation of nanometer technology.
2006-08-10 Analysis tool offers 'sanity check' for parasitic networks
French startup Edxact S.A. has introduced Comanche, a parasitic analysis tool that offers a 'sanity check' for extracted netlists so gross violations can be found before simulation
2004-04-15 TSMC certifies Magma's capacitance extraction accuracy
Magma Design Automation Inc.'s Blast Fusion's built-in parasitic extraction capability has been validated by TSMC for its 0.13?m process
2001-01-01 Techniques for handling electromagnetic interference
This technology article focuses on the primary steps that engineers can take at the PCB level to control common-mode radiated EMI.
2003-05-28 Power MOSFET Basics: Understanding MOSFET Characteristics Associated with the Figure of Merit
This application note focuses on the basic characteristics and understanding of the MOSFET.
2005-01-17 Magma unveils enhanced version of QuickCap
Magma announced QuickCap NX, an enhanced version of its gold-standard QuickCap parasitic capacitance extraction tool.
2007-06-18 IBM pitches air gaps as 'ultimate' dielectric
IBM Corp. has vowed to commercialize the ultimate dielectrica pure vacuumbetween metal lines of its 32nm chips, thereby reducing parasitic capacitance on interconnection layers by 36 percent.
2014-01-22 Develop sense electrodes for 3D touchpad surfaces
Know the most important design choices that need to be made when designing a touchpad for a 3D surface.
2003-09-16 Design challenges and sign-off criteria in nanometer era
In nanometer era, traditional STA and physical verifications are no longer sufficient. The nanometer sign-off flow must comprise SI-validated analysis engines that account for the interactions of multiple-noise sources.
2012-09-24 Circuit board design for IF/RF feedback amps
Read about the key components of PCB design for amplifiers such as LMH6521 and LMH6522 DVGAs.
2014-08-25 Are multi-patterning corners necessary for 16/14 nm?
Multi-patterning is the technique required for printing geometries that are smaller than the wavelength of light used in manufacturing can accurately resolve. Find out if it is indeed needed for 16-nm and 14-nm nodes.
2011-09-05 Address issues in capacitive-touch interface design (Part 2)
Here's a look at production tuning, one-time compensation, and dynamic compensation.
2008-10-03 Uncovering the Cdv/dt shoot-through
During a fast commutation in a half-bridge topology, a temporary short circuit can happen. This event is called Cdv/dt shoot-through. This is linked to a fast voltage variation across one of the two MOSFETs.
2005-09-01 Startup puts team to work on the data explosion
Edxact SA comes out with a tool that accurately provides netlist reduction for parasitic netlist elements
2004-06-03 Silvaco offers full-chip RC extraction
Silvaco International has released Hipex, which claims "3D accurate" resistance and capacitance (RC) extraction
2004-05-14 Silicon modeling in the nanometer era
With 90nm in production and 65nm on the horizon, designs face increasing challenges: finer line widths, longer interconnect, more routing layers and more analog content.
2015-01-16 Modelling package parasitics within IBIS
Package parasitics can be modelled within an IBIS file using a number of methods that differ in their complexity and accuracy. Here's a brief look at these methods.
2004-08-02 Mixed-signal simulation tool supports Linux
Silvaco's mixed-signal simulator, RC inductance extractor and soft-error modeling tool all support Linux under a new GUI.
2015-03-19 Grasping capacitors, ripple and self-heating
Ripple can be a necessary design function, and the considerations can be quite straightforward. In this article, we will take a look at ripple ratingsor how to cook a capacitor.
2005-07-18 Implement component partitioning for system-in-package apps
SiP alternatives need broader supplier collaboration on system-partitioning decisions within the electronics food chain.
2015-04-24 EDA tool reduces design time for FinFETs
The Calibre xACT claims to quickly and accurately extract parasitic capacitance, resistance and inductance for IC designs including digital, custom, analogue and RF.
2007-12-14 TSMC, Altera, Synopsys collaborate on 45nm extraction tool
Synopsys has announced the qualification and immediate availability of the Synopsys Star-RCXT parasitic extraction tool for TSMC's 45nm process technology
2005-10-12 ST boosts passive integration
Swiss-based semiconductor supplier STMicroelectronics has unveiled the first details of a technology the company said significantly increases junction capacitance density in thin-film passive integration
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