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phase-locked loop What is a phase-locked loop (PLL)? Search results

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What is a phase-locked loop (PLL)?
A phase-locked loop or phase lock loop (PLL) is a control system which generates a signal that has a fixed relation to the phase of a "reference" signal. A PLL circuit responds to both the frequency and the phase of the input signals, automatically raisin
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2002-06-12 Using loop filter software for the TRU-050 and loop filter program
This application note details the features of the TRU-050 module, a user-configured, PLL solution designed to simplify a wide variety of clock recovery and data retiming, frequency translation and clock smoothing applications.
2003-03-10 TWC01622 Loop Filters: Compatible Components
This application note provides information of the TWC01622's loop filters' critical parameters and compatible devices that meet these parameters
2006-05-02 PLL solution verifies complete closed loop noise
Xpedion announced GoldenGate, a transistor-level phase-locked loop solution for verifying complete closed loop noise and jitter.
2000-06-29 Frequency/Phase comparator for phase-locked loops
This application note describes a phase comparator that permits PLLs to be constructed using LCA devices, which only require an external VCO and integrating amplifier.
2001-04-05 FM And FSK and BPSK demodulation using the Philips NE/SE564 phase-locked loop demoboards
This application note demonstrates how to use the NE564/SE564 demoboard set as an FM demodulator for wideband analog signals, a data receiver for high-speed FSK signals, and a simplified BPSK adaptation.
2000-12-13 Configuring and applying the MC74HC4046A phase-locked loop
This application note is intended to show how to configure and apply the MC74HC4046A (HC4046A) PLL chip in a circuit design example with a reference frequency of 100kHz, an output frequency of 1MHz the center frequency and has the ability to move from 200kHz to 2MHz in 100kHz steps.
2001-04-05 Clock regenerator with crystal-controlled phase-locked loop VCO (NE564)
This application note discusses how to achieve clock regeneration using Philips Semiconductors' NE564 crystal-controlled PLL.
2002-01-25 Zarlink chip packs three PLLs to reduce signal wander
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2005-07-27 WiMAX synthesizer modules from Sirenza streamline design
Sirenza announced the release of the first in a new family of phase-locked loop synthesizer modules, the PLL350-2444, targeting WiMAX (802.16-2004) infrastructure applications.
2003-08-29 Using Two-Point Modulation to reduce Synthesizer Problems when Designing DC_Coupled GMSK Modulators
This application note discusses the problems encountered when designing GMSK modulators with respect to the characteristics of PLL frequency synthesizers, and illustrates how two-point modulation can be used to solve them.
2005-11-10 Tuner meets all DVB, cable, terrestrial and analog standards
Zarlink Semiconductor launched a new MOPLL single-conversion tuner for the fast-growth digital TV market
2006-12-08 True Circuits rolls out silicon proven 65nm analog IP
True Circuits Inc. has announced "silicon proven" phase-locked loop and delay-locked loop hard macros using TSMC's 65nm process.
2006-11-10 TI unveils 'first' DDR3 register-with-PLL for RDIMMs
The SN74SSTE32882 from Texas Instruments is touted by the company as the industry's first fully integrated register and PLL for DDR3 RDIMMs.
2004-08-19 TI IC includes three PLL filter components
Touted by TI to offer a best-in-class performance, the company's latest clocking IC features three on-chip phase locked loop filter components.
2008-04-23 TI announces full production release of DDR3 register
Texas Instruments claims the industry's first full production release of a PLL integrated DDR3 register for RDIMMs.
2002-11-26 TDA8752B PLL Calculator method and software
This application note describes the method to calculate the TDA8752B PLL parameters and describe the use of the PLL calculator program.
2011-10-03 Synthesizers tout 0.37-5.79GHz frequency range
Linear Tech has released a family of integer-N frequency synthesizers with integrated VCO.
2004-03-16 Sirenza PLL synthesizer modules suit ISM apps
Sirenza Microdevices has released three Phase Locked Loop Synthesizer modules targeting industrial, scientific and medical band apps.
2004-05-31 Richardson to offer Z-Comm VCO, PLL products
Richardson Electronics Ltd has signed a distribution agreement with Z-Communications Inc., a manufacturer of voltage controlled oscillators (VCOs) and highly integrated signal source solutions, including compact phase locked loop (PLL) modules.
2013-02-18 Richardson rolls out 18GHz Microwave PLL Synthesiser
The ADF41020 can be used to implement local oscillators as high as 18GHz in the up-conversion and down-conversion sections of wireless receivers and transmitters.
2006-02-10 PLLs feature 'best spur performance'
National Semiconductor Corp. introduced the LMX248x family of high-performance, power-efficient PLLatinum delta-sigma phase-locked loops
2002-06-12 Phase noise
This application note presents a short discussion on phase noise, including phase noise testing.
2003-06-16 PC, consumer apps get fast PLL macros
True Circuits Inc. launched two PLL macros enhanced with their LockNow technology.
2002-11-20 ORCA Series 4 FPGA PLL Elements
This application note discusses the ORCA Series 4 FPGA PLL Elements, designed for the delivery of networking IP.
2003-04-04 ON Semi replaces Motorola PLL clock synthesizers
ON Semiconductor has introduced the first family of six programmable PLL clock synthesizers that are replacements for discontinued Motorola devices.
2002-08-16 National frequency synthesizers suit 2.5G, 3G basestations
National Semiconductor Corp. has introduced the LMX2346 and LMX2347 frequency synthesizers that feature low-phase noise and are targeted for 2G, 2.5G, and 3G basestations.
2003-04-09 National delta-sigma PLLs boast low power consumption
National Semiconductor Corp. has introduced a new family of delta-sigma fractional-N PLLs into its PLLatium portfolio of devices for use in cellular applications.
2003-08-15 Multitrunk System Synchronizer
This application note provides designers with information on implementing the MT9024B Multitrunk System Synchronizer in a telecommunications network.
2005-05-02 Limits of IP block strategy exposed
Analog IP must be offered within the context of a broader solution that includes tools, services and lots of support.
2002-06-12 Jitter in clock sources
This application note features a detailed discussion on jitter.
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