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2007-05-14 Establishing mobile security
Every company in the mobile technology community should start considering how to proceed to take advantage of the MTM specification and to implement improved security in their next-generation products
2007-03-16 Electrical DFM promises gains in parametric yield
Design techniques are under greater pressure to provide equivalent scaling to enable the semiconductor road map to continue in a cost-effective way.
2006-09-01 EDA app shows variants of IC design
DFM tool provider Aprio Technologies Inc. has developed an application extension, Halo-Quest, designed to fit on top of EDA design and analysis tools, and to generate accurate silicon image representation of IC designs for use within design flows.
2010-11-30 Design methods shift to software
Changes in electronics design methodology seem to occur in ten-year stagesfrom the IDM's of the 1970s, ASICs in the 1980s, fabless companies in the 1990s, to the 2000s when application software took control.
2007-03-16 CPF-compliant tools aim for low power
Cadence Design Systems Inc. has added the Common Power Format to its existing logic design, verification and implementation tools
2009-07-14 Chartered expands 65nm foundry portfolio
Expanding its foundry portfolio, Sinsgapore's Chartered Semiconductor Manufacturing Pte. Ltd has rolled out separate low-power and RF processes, based on its 65nm technology
2010-12-13 Cadence, SMIC collaborate for 54nm SoC flow
Semiconductor Manufacturing International Corp. has adopted Cadence's Encounter Digital Implementation System as the foundation for SMIC's Reference Flow 4.1
2003-02-17 Bridging optical and Ethernet
Through the use of flexible bridging technologies, the existing optical infrastructure can support today's data-heavy traffic patterns allows new features without overly taxing unavailable corporate investment.
2014-02-12 ARM, SMIC expands partnership for high-performance SoC designs
The collaboration will offer the ARM Artisan physical IP platform for SMIC's 28nm process to deliver high-performance, high-density and low-power technologies for consumer and mobile applications
2003-11-17 Agilent brings full-wave modeling to Virtuoso
Agilent Technologies has introduced an addition to its RF Design Environment that offers full-wave electromagnetic modeling for users of Cadence Design Systems' Virtuoso custom design platform.
2005-06-15 Aeluros makes 'green' versions
Aeluros recently announced green variants of its Puma 10Gbps physical layer IC devices
2013-08-27 Achieve successful timing closure
Find out how to derive design margins for successful timing closure.
2005-03-30 'Concurrent' IC design suite rolls
Synopsys rolled out IC Compiler, which concurrently runs physical synthesis, clock tree synthesis, placement, routing, yield optimization and signoff correlation
2002-03-25 Process variations spark lively debate
In a spirited exchange between academicians, industry process engineers and researchers, a panel at the International Symposium on Quality Electronic Design explored one of the best-kept but most sinister secrets in advanced IC design: the growing threat of process variations.
2006-08-30 Toshiba tapeouts 90nm IC with Synopsys compiler
Synopsys announced that Toshiba has used the Synopsys IC Compiler physical implementation solution to tape out its next-generation TC90515XBG home digital network chip
2004-12-03 Synopsys' Galaxy platform supports Sasken reference flow
Synopsys Inc. has announced that Sasken, an embedded telecommunications technology solution provider, has used its' Galaxy design platform to develop a reference flow to enhance the implementation and signoff process for its complex designs
2004-11-23 Synopsys supports Xeon processor with Intel EM64T
Synopsys Inc. claimed to be the first EDA software company to support the Intel Xeon processor with Intel Extended Memory 64 Technology (Intel EM64T) for 64bit and 32bit computing with the Red Hat Enterprise Linux version 3 operating system using its Galaxy design and Discovery verification technology
2014-06-06 Synopsys joins in ST-Samsung FD-SOI collaboration
The extension of the collaboration facilitates the provision of Synopsys' Galaxy design flow for ST's 28nm FD-SOI technology, the adoption of which is expected to be accelerated
2006-07-05 Sunplus tapes-out design with Synopsys solution
Synopsys announced that Sunplus has taped-out a large high-density consumer design with Synopsys' IC Compiler physical implementation solution
2007-02-15 ST adopts Synopsys compiler for ASIC design
STMicroelectronics has deployed Synopsys Inc.'s Design Compiler topographical technology in its 90nm and 65nm ASIC design flow to eliminate design iterations and streamline the overall design cycle for its internal design groups and external customers
2006-06-21 Sierra Pinnacle adopted by NEC for high-end EMMA designs
Sierra Design Automation Inc. announced that Sierra Pinnacle was selected by NEC Electronics as the physical implementation tool of choice after multiple design successes
2006-05-10 SGI adopts Synopsys' topographical tech
Synopsys announced that Silicon Graphics has deployed Synopsys' Design Compiler topographical technology for its next-generation ASIC designs
2005-06-29 Renesas tapes out 90nm production using Synopsys Galaxy
Renesas Technology Corp. has taped out a 90nm SoC design for wireless applications using Synopsys Inc.'s Galaxy design platform
2009-03-19 Power management for optimal design
This article describes a holistic approach for managing and optimizing the power in a design. Effective power management involves proper understanding the application of a chip, technology selection, design techniques and methodology
2012-09-27 PCB tech speeds dev't thru Microsoft SharePoint
Cadence's Allegro PCB technology claims to enable timing-aware physical implementation and verification to accelerate timing closure of high-speed interfaces by 30-50 per cent.
2011-04-28 Packaging tool offers advanced miniaturization
Cadence has unveiled the Allegro 16.5 PCB and IC packaging technology, offering capabilities that increase both productivity and predictability across silicon, SoC and system development
2006-07-28 New Synopsys tool speeds production, time-to-market
Synopsis said PrimeYield predicts design-induced mechanisms that threaten manufacturing tolerances and provides automated correction guidance to upstream design implementation tools, resulting in accelerated time-to-production and time-to-market
2005-10-07 New design flow for ARM Cortex-A8 processor from Synopsys
Synopsys and ARM demonstrated the successful integration of Synopsys' Galaxy RTL synthesis, hierarchical design planning, physical implementation solution, sign-off and Discovery verification solution within a high-performance design flow for the new ARM Cortex-A8 processor
2006-06-29 Micronas tapes-out HDTV chip with Synopsys solution
Synopsys announced that Micronas has taped-out one of its HDTV chips using Synopsys' IC Compiler physical implementation solution
2004-05-05 Magma Design gets hold of Mojave
Magma Design Automation Inc. has completed its acquisition of Mojave Inc., a developer of advanced technology for IC manufacturability and verification
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