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What is PLL?
A phase-locked loop or phase lock loop (PLL) is a control system which generates a signal that has a fixed relation to the phase of a "reference" signal. A PLL circuit responds to both the frequency and the phase of the input signals, automatically raisin
total search809 articles
2002-09-13 Zarlink SAR ICs integrate PLL, SRAM
Zarlink Semiconductor has announced the immediate availability of what they claim to be the industry's two most highly integrated AAL1 segmentation and reassembly chips for TDM-to-ATM conversion.
2003-08-08 Zarlink analog PLL simplifies line card design
Zarlink Semiconductor has unveiled an analog PLL timing chip for optical line cards operating at OC-192 rates.
2003-05-22 Zarlink analog PLL has six ultra-low jitter clocks
The ZL30406 analog PLL from Zarlink Semiconductor has six low-jitter output clocks for optical line cards that is claimed by the company to allow designers to shrink size, cost, and power of line card timing designs.
2015-05-26 Wideband RF synthesiser/PLL operates on low power
The 8V97051 contains an integrated voltage-controlled oscillator (VCO) with a large tuning range capable of providing multi-band local oscillator (LO) frequency synthesis.
2004-05-27 Using the PE3293 fractional-N PLL in single-band 1800 and dual-band CDMA solutions
This app note presents the PE3293 fractional-N PLL in single-band 1800 and dual-band CDMA solutions.
2004-05-27 Using the PE3291 fractional-N PLL in narrow-band/paging applications
This app note presents the PE3291 fractional-N PLL in narrow-band/paging applications.
2002-12-04 Using the NJ88C33 PLL synthesizer
This article encourages the manipulation of variables with phase-locked loop parameters in general.
2003-05-27 Understanding phase noise from digital components in PLL frequency
This application note explains how the phase noise from the digital components in a PLL synthesizer (dividers, phase detector and charge pump) can be understood in terms of timing jitter in these devices.
2005-06-01 Understanding jitter requirements of PLL-based processors
This app note describes jitter issues of the clock from which PLL-based processors derive timing.
2006-11-10 TI unveils 'first' DDR3 register-with-PLL for RDIMMs
The SN74SSTE32882 from Texas Instruments is touted by the company as the industry's first fully integrated register and PLL for DDR3 RDIMMs.
2004-08-19 TI IC includes three PLL filter components
Touted by TI to offer a best-in-class performance, the company's latest clocking IC features three on-chip phase locked loop filter components.
2005-10-25 TI clock multiplier integrates three on-chip PLL components
TI announced that they have developed a clock multiplier that integrates three on-chip phase locked loop components to provide "industry-leading" flexibility and performance.
2001-09-27 The RC charge pump: A versatile RF library circuit for phase locked loops (PLL) and beyond
This application note describes the versatility of the RC Charge Pump token in SystemView's RF library to satisfy many design tasks.
2002-11-20 TDA8752B PLL calculator: method & software
This application note describes the method to calculate the TDA8752B PLL parameters using the PLL calculator program.
2002-11-26 TDA8752B PLL Calculator method and software
This application note describes the method to calculate the TDA8752B PLL parameters and describe the use of the PLL calculator program.
2000-11-30 Startup time, profile measurement of PLL VCOs and crystal oscillators
This application note intends to alleviate the anxiety and pain that have been associated with startup time and profile measurements of PLL VCOs and crystal oscillators by introducing a test setup that is user-friendly and convenient to build.
2004-03-16 Sirenza PLL synthesizer modules suit ISM apps
Sirenza Microdevices has released three Phase Locked Loop Synthesizer modules targeting industrial, scientific and medical band apps.
2004-05-04 Set up a PLL loop filter on the eZ80F91 MCU
This app note allows application developers to effectively use the eZ80F91 MCU's on-chip PLL feature as a system clock source.
2001-10-18 S3064 PLL board decoupling guidelines
This application note illustrates the decoupling connections for the S3064 SONET/SDH/ATM receiver.
2001-10-18 S3063 PLL board decoupling guidelines
This application note illustrates the decoupling connections for the S3063 SONET/SDH/ATM transmitter.
2004-05-31 Richardson to offer Z-Comm VCO, PLL products
Richardson Electronics Ltd has signed a distribution agreement with Z-Communications Inc., a manufacturer of voltage controlled oscillators (VCOs) and highly integrated signal source solutions, including compact phase locked loop (PLL) modules.
2013-02-18 Richardson rolls out 18GHz Microwave PLL Synthesiser
The ADF41020 can be used to implement local oscillators as high as 18GHz in the up-conversion and down-conversion sections of wireless receivers and transmitters.
2001-06-15 Programming guide integer N PLL synthesizer 35- to 1,100MHz
This application note presents a programming overview for an integer N PLL frequency synthesizer.
2009-08-26 PLL/synthesizers feature 10KHz step size
Crystek Corp. introduces a PLL/synthesizer that runs from 1,800MHz to 1,860MHz, with a step size of 10KHz.
2007-03-19 PLL-based clock generators deliver sub-ps jitter
ON Semiconductor has announced a new family of PLL-based clock generation devices that deliver 50 percent better phase jitter than competitive products.
2007-12-13 PLL-based clock generators create ultralow jitter
ON Semiconductor has launched PLL-based devices for creating ultralow-jitter quality clocks that improve timing accuracy, increase design flexibility and lower cost for PCIe, Ethernet and FB DIMM applications.
2007-12-21 PLL VCO covers 500MHz to 3.5GHz frequencies
Raltron Electronics Corp. has released its PCC-A1-3100 phase lock loop (PLL) family of VCOs that covers a frequency range from 500MHz and 3.5GHz.
2006-02-15 PLL targets ATCA, AMC architectures
Zarlink Semiconductor launched a single-chip, ultra-low jitter synchronizer for network interface cards.
2010-06-23 PLL synthesizer cuts need for active loop filters
Analog Devices Inc. has released a PLL synthesizer that can be used to directly drive high tuning-voltage external voltage-controlled oscillators, eliminating the need for active loop filters.
2010-01-08 PLL synthesizer cuts costs in FMCW radars
Analog Devices Inc. has released a new PLL synthesizer that enables flexible and cost-effective implementation of frequency modulated continuous wave (FMCW) radar systems.
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