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2013-02-18 Varitronix injects $25m into LCD design, development line
Varitronix recently announced a $25 million investment into a new LCD manufacturing facility that will support design and development, display cell production and LCD module assembly
2009-06-17 S-Touch design procedure
This application note aims to provide the system/hardware engineers enough ground knowledge to start the design of capacitive touch interface solutions with the S-Touch capacitive controller devices
2004-12-07 Procedures to design 220VAC CFL solutions with the IR2520D
This app note explains how to design CFL ballasts and 220VAC input using the IR2520D ballast control HVIC
2004-12-07 Procedures to design 120VAC CFL solutions with the IR2520D
This app note explains how to design CFL ballasts and 120VAC input using the IR2520D ballast control HVIC
2015-01-28 Preventing embedded PCB design defects
Printed circuit board defects can remain unnoticed until failure occurs, so it is important to implement disciplined practices even at the early stages of design
2000-12-20 Link circuit design with dry MKK capacitors
This application note presents some design procedures on component selection and scaling of self-healing, gas-impregnated MKK DC capacitors to allow users to work out optimum circuit designs right from the project planning stage.
2009-02-09 Integrated equalizer IC simplifies 10G SFP+ design
Phyworks has released the PHY1066 equalizer, driver and retimer IC that the enables host board designers to create 10Gbit/s Ethernet SFP+ receive and transmit interfaces for 'direct attach' passive twin-ax copper cables and 10GBASE-SR optical modules.
2015-05-13 GUI for avionics lightning protection design
Read about a GUI that performs all the calculations and outputs the results. These results can then be compared to datasheets for component selection, allowing for rapid design of robust lightning protection
2009-03-26 GEPON ref design packs transmit power monitor
Phyworks has beefed up its reference design for FTTx GEPON modules with the addition of transmit power monitoring to its digital diagnostics and set-up facilities
2014-02-13 Energy design through unified hardware abstraction
Learn how to achieve energy-efficient solutions through optimal alignment across the pre- and post-silicon phases of energy optimisation supported by unified design flows, abstractions and formats
2013-01-11 Easing thermal management design, production
Thermal management, whether the end user is the military, aerospace industry or Silicon Valley, should entail extremely close association and planning at all stages.
2011-10-05 Debug platform eases SoC design, verification
SpringSoft's open platform allows the creation and sharing of custom applications through the company's debug system.
2005-10-26 Cisco declares 'design-for-environment' era
Equipment and chip makers must change their mindsets and develop 'design-for-environment' business practices to prepare for a new wave of green legislation affecting the global electronics industry, warned an official from Cisco Systems Inc
2004-11-17 austriamicro design kit includes DFM features
austriamicro's Full Service Foundry announced the availability of its 50V 0.35?m High-Voltage CMOS Process Design Kit with integrated DFM features
2008-11-07 Amimon boasts WHDI tech in HDTV design win
Consumer electronics makers are differentiating TV tuner and media receiver units from HDTV displays, thus releasing the first round of a wireless home network struggle emphasizing on simple, two-way HD wireless connectivity between display and tuner.
2004-06-28 Alliance takes first crack at consumer design guidelines
The Digital Home Working Group announced its first set of interoperability guidelines for networked consumer systems, an expanded membership list and a new name here Tuesday, June 22, 2004.
2007-04-17 A WiMAX double downconversion IF sampling receiver design
The design approach and implementation procedures are presented to allow designers to easily modify the receiver chain to address other bands such as Wireless Broadband (WiBro) and other cellular standards such as TD-SCDMA.
2001-05-24 Using PrimeTime in LSI Logic's FlexStream design flow
This application note outlines the procedures LSI Logic recommends to customers on performing static timing analysis using the PrimeTime analysis tool
2001-05-24 Using formality in LSI Logic's FlexStream design flow
This application describes procedures and recommendations for using the Formality formal equivalence checking tool for Gate to Gate equivalence checking
2001-05-24 Using formality for RTL-to-gate in LSI Logic's FlexStream design flow
This application note describes procedures and recommendations for using the Formality formal equivalence checking tool for RTL-to-gate equivalence checking
2008-06-16 Unlock precision comparator design
This article discusses several problems with applying typical comparators to precision voltage-level detection and concludes with a new precision comparator that overcomes these problems.
2012-07-26 Techniques, procedures for die bonding
Here's a look at various techniques for die bonding, a process of connecting die to the package for communication to the outside world.
2009-05-07 Do's and don'ts of applying A/D converters
In many applications, the limitation in the performance of a system lies in how the individual components are used. The ADC can also be considered as a component. Therefore, proper design procedures are necessary to obtain the optimum accuracy.
2005-09-16 When infrastructure is essence: Open-Silicon automates the flow
Researchers implement an automated decision and control flow that supports data as it moves through the design process
2013-06-04 TSMC certifies Mentor EDA tools for 16nm FinFET
Mentor Graphics design and verification tools get certified for TSMC's 16nm FinFET process node. The companies also detailed their continued collaboration on 20nm physical verification kit optimisations
2006-06-01 Tools help harness multicore power
The move toward multiple processors on a single chip, on a single board and in a single system to provide more features and speed at lower power may have solved certain embedded-hardware design problems. But for software developers and vendors, embedded multiprocessing presents a daunting set of challenges
2010-11-19 System brings boundary-scan test to small designers
Corelis Inc.'s TestGenie offers a low-cost, low-risk boundary-scan test solution for companies with limited resources, minimal JTAG experience, fixed schedules and tight test budgets.
2009-01-22 Synthesis tools' new versions promise better performance
Synfora Inc. has announced new versions of their PICO Extreme and PICO Extreme FPGA algorithmic synthesis design tools that will achieve higher performance and smaller area than the previous generation of the tools
2004-03-18 Synopsys takes another stab at FPGA synthesis
Synopsys has tweaked its Design Compiler ASIC synthesis tool to enable designers to use the same tools and potentially the same design flow for ASICs and FPGAs
2009-03-18 Synopsys aims to accelerate chip development
Synopsys is making available an automated chip development environment that the company says combines an RTL-to-GDSII design flow with productivity-enhancing features to accelerate chip development while mitigating the risks of designing at new process nodes
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