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2007-06-28 TSMC, Cadence team on 65nm wireless design flow
Cadence and TSMC have teamed on nanometer wireless design and produced a new TSMC 65nm RF PDK compatible with the new Cadence Virtuoso custom design platform
2013-09-10 TSMC certifies Synopsis' design solution for 16nm FinFETs
Synopsys' Laker custom design solution provides users with access to a wide range of TSMC process technologies, from 180nm to 16nm
2003-06-27 Tower PDKs simplify design environments
Tower Semiconductor Ltd. and Cadence Design Systems have announced the availability of the TSL018 and TSL035 foundry-level Process Design Kits that eliminate the need for users to create their own "views" of the Tower technologies in their design environments
2008-03-17 Succeed at 65nm design
A true DFM-aware environment accounts for process variability and lithographic effects in the context of timing, power, noise and yield at every stage of the flow. This begins with the characterization of the cell library, continues through implementation, analysis and optimization, and ends with sign-off verification
2002-09-03 Silterra's RF process called compatible with TSMC's
Silterra Malaysia is ready to offer customers an RF and mixed-signal version of its baseline 0.185m process
2006-03-07 RF design toolkit expands model selection
XMOD Technologies has announced the release of version 2.6 of the HiCUM Master toolkit, which is designed to address the needs of the SiGe BiCMOS market.
2011-02-09 Process Design Kit standards elude industry
Disagreements over approaches to PDK standards have indefinitely delayed a solution could enable and speed up new analog and mixed-signal designs in foundries.
2004-04-21 PolarFab offers new robust BCD process
PolarFab now offers a BCD process that permits designers to fabricate analog and mixed-signal integrated circuits operating up to 60V
2003-06-26 PolarFab delivers Silvaco process design kits
Silvaco and PolarFab have announced the availability of process design kits for PolarFab's BP30 30V bipolar process that supports Silvaco custom IC CAD tools
2011-01-21 PDK and reference flow for 0.18um power management process
Tanner EDA and TowerJazz announce PDK for 0.18um power management process. Kit includes symbol libraries for schematic capture software as well as parameterized layout generators for L-Edit
2008-06-13 OTP memory cells meet 0.35?m process
austriamicrosystems' Full Service Foundry business unit announced at the Design Automation and Conference, a further expansion of its IP block portfolio with the launch of a complete set of OTP (one-time-programmable) cells for its 0.35?m process family
2005-10-07 New DFM reference design flow for austriamicro's CMOS process
austriamicrosystems' business unit Full Service Foundry recently announced the availability of its DFM reference design flow for its 0.35?m high-voltage CMOS process
2005-01-12 MagnaChip new design kit supports Agilent RF EDA
With the hope of expanding interest in its mixed-signal/RF CMOS processes, South Korea's MagnaChip Semiconductor is releasing a process design kit supporting Agilent's RF EDA design flow.
2006-05-11 KPIT Cummins adopts Cadence AMS kit
The Indian arm of Cadence announced that KPIT Cummins has adopted its AMS Methodology Kit to help its analog mixed-signal designers simplify the application of Cadence technology
2006-08-11 Korean foundry teams up with Cadence on process design kit
Dongbu Electronics said it has developed process design kits (PDKs) for high-voltage semiconductor devices
2011-02-04 Imec, Coventor team for MEMS design, manufacturing
The partnership aims to make MEMS more accessible to MEMS and IC designers by developing a process design kit for Imec's SiGe MEMS technology where MEMS are processed on top of CMOS circuits.
2015-02-27 Hua Hong develops 0.2?m RF SOI process design kit
Hua Hong's 0.2m RF SOI PDK solution is developed from Cadence's IC5141 EDA software, and integrates RF modelling and simulation platform such as PSP SOI and BSIM SOI.
2015-07-01 GlobalFoundries announces 22nm FD-SOI process
The promise of GlobalFoundries' 22nm FD-SOI solution, according to an executive, is to offer its customers roughly a 14nm FinFET performance at about 28nm cost.
2006-11-14 EDA panelists call for standardized process design kits
Standardization of foundry process design kits will provide major benefits for analog and custom IC designers, according to panelists at the Synopsys EDA Interoperability Developer's Forum
2006-11-16 Design RFICs with greater speed, accuracy
In RFIC design, a "meet-in-the-middle" approach balances top-down fast design processes with bottom-up silicon accuracy to produce a predictable schedule, leading to first-pass silicon success
2006-06-23 Cree, AWR offer MMIC process design kit
Cree and AWR have introduced a process design kit that allows designers to use Cree's MMIC process within AWR's Microwave Office software environment.
2002-04-01 Chartered, Cadence partner in design kit offering
Cadence Design Systems Inc. and Chartered Semiconductor Mfg have collaborated to help the mixed-signal market reduce cycle times on designs using Chartered's foundry process design kits
2002-09-05 Chartered preps 0.185m SiGe process
Chartered Semiconductor Mfg will expand its foundry service offerings to the communications sector by rolling out a 0.185m SiGe BiCMOS manufacturing capability in 2H of 2003.
2005-10-10 Cadence, UMC develop reference design for wireless
EDA supplier Cadence Design Systems Inc. and Taiwan-based semiconductor foundry UMC have announced a collaborative agreement to develop a comprehensive reference solution for complex wireless designs
2006-11-14 Cadence, SMIC to address wireless design challenges in China
Cadence Design Systems and Semiconductor Manufacturing International Corp. will partner to offer RF applicability training and workshops for wireless chip designers in China
2007-08-06 Cadence, SMIC team on RF chip design
Cadence and SMIC have collaborated to develop an RF design solution and announced the availability of SMIC RFCMOS 180nm PDK that supports the Cadence RF Design Methodology Kit
2005-09-15 Cadence offers shorter AMS design cycle
The AMS Methodology Kit from Cadence promises to enable analog mixed-signal designers of wireless, wired and consumer electronics devices to achieve shorter, more predictable design cycles while creating reusable AMS blocks
2004-07-28 AWR, TSMC team up for SiGe design platform
Applied Wave Research and TSMC will jointly develop and deliver a design platform for TSMC's 0.35?m silicon germanium process
2004-11-17 austriamicro design kit includes DFM features
austriamicro's Full Service Foundry announced the availability of its 50V 0.35?m High-Voltage CMOS Process Design Kit with integrated DFM features
2007-06-08 Agilent boosts investment in RF/microwave design
Agilent Technologies Inc. announced the expansion of technologies in its Advanced Design System and GENESYS design platforms to provide a full spectrum of software tools for microwave and RF designers
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