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2015-11-03 Hardware emulation for complex networking chips
To overcome network congestion and outages, project teams designing complex switches and routers have turned to hardware emulation as the foundation for their verification strategy.
2003-11-11 GarField Micro joins Magma design program
U.K.-based GarField Microelectronics Ltd has been signed by Magma Design Automation Inc. as a MagmaTies Certified Design Center.
2002-06-27 Gadzoox to sell technology behind its Fibre Channel switches
Following three years of declining sales and a change in management, switch maker Gadzoox Networks Inc. has decided to provide its core silicon IP to other manufacturers.
2011-01-17 Fujitsu auto electronics adopts Springsoft system
SpringSoft's Certitude System is to be used by Fujitsu's automotive business unit to raise the quality of verification environments and I) design components required to develop automotive MCU solutions.
2005-03-10 Fraunhofer IIS selects Mentor Graphics Catapult C Synthesis tool
Mentor Graphics Corp. announced that the Fraunhofer Institute for Integrated Circuits IIS has selected the Mentor Graphics Catapult C Synthesis tool for use in next-generation digital broadcast applications
2003-03-20 FPGA tool startup aims to make ASICs obsolete
An EDA startup staffed by seasoned industry vets said its FPGA design tools will make ASICs obsolete for most standard products.
2005-03-21 Formal tool able to verify false paths
Real Intent's new software timing-exception prover promises to save designers from a lengthy manual review cycle.
2015-09-08 Examining performance in hardware emulators
Emulation performanceor the speed of its executiondepends on the architecture of the emulation system and the type of deployment.
2006-11-08 Equivalence checker eyes clock gating
The sequential equivalence checker that Calypto Design Systems will release soon promises to automate the verification of clock-gating circuitry.
2005-06-14 Emerging DFM, verification technologies most exciting, CTOs say
Emerging technologies for design for manufacturing (DFM) and verification are the most exciting developments in the design realm, concluded a panel of chief technology officers convened here Monday (June 13) at the Design Automation Conference (DAC).
2004-06-01 Embedded synthesis enhances high-density FPGA tools
Tools developed specifically for deep submicron programmable devices are emerging, enabling 100,000 gate and greater FPGAs to become mainstream choices.
2004-06-01 EDA startup preps tools for RTL closure
Blue Pearl Software said its upcoming technology will identify and fix functional and DFT errors in RTL code, locate false paths and automatically generate timing constraints for synthesis.
2003-12-09 EDA startup pioneers assertion-based synthesis
Startup Bluespec Inc. will preview an "assertion-based" synthesis technology next week that it describes as a new approach to chip design.
2003-08-13 Designers gravitate toward RTL sign-off
Support appears to be growing for RTL sign-off, a radical concept that would see mainstream ASIC designers bypass the synthesis and IC layout steps.
2002-02-11 Cynergy closure casts shadow on C design market
Cynergy System Design, a provider of C language design tools, has run out of cash and is closing its doors, according to a former executive.
2010-04-15 Comment: EDA needs to innovate more
Oasys Design Systems executive chairman Sanjic Kaul discusses what the challenges in the EDA industry and what steps to take to overcome them.
2005-06-15 Cadence details enterprise verification strategy
Cadence Design Systems Inc. outlined the company's strategy for "enterprise" verification process automation (VPA) at a breakfast for journalists and analysts Monday (June 13) kicking off the Design Automation Conference (DAC).
2007-02-01 Cadence deploys CPF in low-power design flow
Cadence Design Systems has added the Common Power Format (CPF) to its existing logic design, verification and implementation tools.
2014-05-29 Breker gains Synopsys' VIA membership
The membership will facilitate the integration of its TrekSoC software to generate self-verifying C test cases to run on embedded processors with Verdi, allowing users to move seamlessly between TrekSoC's GUI and the Verdi environment.
2005-01-31 Back to the language roots
Although SystemC has its place in the hardware-design process, it still can't compete with Verilog and VHDL.
2010-09-17 AppliedMicro chooses Tensilica for high-throughput project
Tensilica, Inc. has just announced that AppliedMicro has chosen Tensilica's Xtensa LX dataplane processors (DPUs) for their upcoming high-throughput communications chip design project.
2011-05-27 Analysis package simplifies validation, data analysis
Carbon Design optimizes data analysis and validation by making its AMBA AXI analysis package available to SoC Designer Plus.
2012-06-21 Acquisition expands Altrenta's RTL platform portfolio
Atrenta says that its acquisition of NextOp Software will accelerate its growth in front end design.
2002-09-23 0-In Design: A preferred approach for verification
Companies designing complex multimillion gate ASICs recognize functional verification as one of the largest problems facing design teams.
2005-11-08 PHY, digital core IP combo integrates HDMI in SoCs
Silicon Image unveiled a HDMI digital IP receiver and transmitter core with a companion PHY chip for MPEG SoC designs.
2005-01-19 LSI RapidChip family aims to speed migration from FPGAs
LSI Logic announced early this week the next family in their expanding array of structured ASIC products, the Integrator-2.
2005-05-02 Limits of IP block strategy exposed
Analog IP must be offered within the context of a broader solution that includes tools, services and lots of support.
2014-05-02 Freeware catches on in electronics DIY projects
Free software applications have mushroomed over the Internet lately, including electronics engineering tools that prove as good as paid tools. Sourceforge's Cedar Logic Simulator, DesignSpark's PCB, Static Free Software's Electric VLSI, and TinyCAD are among those who make the top ten list.
2007-10-16 Cadence, Mentor unify SystemVerilog method
Cadence Design Systems Inc. and Mentor Graphics Corp. have joined forces to promote a common approach to the verification of design files based on SystemVerilog.
2009-08-03 Touch-interface systems pack haptic controller
Maxim Integrated Products has developed the MAX11810 and MAX11811, the first touch-interface systems with integrated 4-wire touchscreen controllers, haptic controller drivers, and IR-based proximity sensing.
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