Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Advanced Search > routing

routing Search results

?
?
total search1415 articles
2005-06-17 Valere's ultra-compact power systems support wireless networks
Valere Power announced new versions of its Mini DC Power System that expand the system's application range to include in-building and other small wireless networking sites.
2014-07-28 Utilising ARM Cortex-M based SoCs (Part 2)
The second instalment compares the capabilities of a standard microcontroller approach to the design of an embedded application to that of a system on chip approach.
2012-02-17 Using OpenFlow protocol to control network flow
Learn why it is important to build the open-source specification OpenFlow into routers, switches, and other devices to realize the benefits of Software-Defined Networks.
2012-11-29 Using JESD204B for wideband data converter apps
The JESD204A/B interface minimises the number of digital inputs/outputs between data converters and other devices, such as FPGAs and SoCs.
2015-08-20 Using DRC for SERDES PCB layouts
In order to be sure that SERDES bus traces on a routed printed circuit board are error free, you may use an automated design rule checker, which makes such tasks easier.
2005-02-15 Users laud C design in DAC 'trip report'
Engineers are warming to C language design tools, according to reviews in the Design Automation Conference (DAC) &quote;trip report&quote; released Friday (Feb. 11) by industry gadfly John Cooley.
2011-11-23 USB-to-Ethernet controller cuts BOM, power use
The LAN9730 links SoCs and peripherals, and are targeted for low power applications.
2008-08-19 USB 3.0 controller spec revealed
Intel Corp. has released a nearly complete specification for a USB 3.0 controller chip.
2009-07-31 USB 2.0 mux offers >12kV ESD performance
The ISL54222A fits the bill when internal USB high-speed ports need to share a single USB connector.
2009-07-07 Upstream amp runs on 1.25W
Maxim launches the MAX3518 upstream amplifier claiming the industry's lowest power consumption.
2004-01-16 Upgrading to a real-time IP network
Despite this impressive growth, IP networks have not succeeded in supporting real-time apps and converged legacy services.
2004-12-03 Updated Altium PCB design system include new technologies
A new PCB design system for layout professionals was recently released by Altium Ltd.
2004-09-01 Understanding passive channel
It is imperative that engineers fully understand passive channel to tackle serial data transmission for 10Gbps and beyond.
2008-03-04 Understanding low-power wireless network standards
Bluetooth, Wi-Fi and ZigBee all have a place in the world of wireless communications. But for different reasons, none are a particularly good fit for wireless sensor networks.
2015-03-26 Understanding design compilation in hardware emulators
Design capacity in hardware emulators, also the compilation flow, is heavily dependent on the type of technology utilised in the verification engine.
2013-06-19 Understanding deep packet inspection (Part 1)
Here's a look at the use cases and common requirements for DPI applications.
2013-02-12 UMC, Synopsys partner for design verification at 28nm
UMC selected Synopsys' IC Validator physical verification product for lithography hot-spot checking to accelerate physical signoff at 28nm.
2004-05-10 UMC, AMIC team up in 90nm SRAM production
UMC and AMIC Technology Corp. announced that they have produced AMIC's high-speed Zero Bus Latency (ZeBL) SRAM using UMC's 90nm process.
2005-04-13 UMC poised to use X architecture for 90nm chips
Foundry United Microelectronics Corp. is ready to manufacture 90nm chips using the nontraditional X architecture.
2008-06-11 Ultralow-power FPGA aims to break industry records
The folks at SiliconBlue have just announced a revolutionary new class of single-chip, ultralow-power FPGA devices, that they say set a new industry standard for price, power, and space along with unprecedented ASIC-like logic capacity for battery-powered, handheld consumer applications.
2008-11-25 Typical FETKY applications
This short note tries to cover typical applications of the FETKY devices in brief.
2004-05-26 Tyco power-distribution module facilitates battery-backup
Tyco Electronics' new 1U, NP CDM connects the company's NP series of 48V rectifier systems to one or two battery strings.
2011-07-08 Tuner-demodulator IC touts energy efficiency, power control
Hitron Technologies have selected MaxLinear's MxL261 digital cable multichannel tuner-demodulator single-chip front end IC for its modems and gateways.
2006-05-29 TSMC, UMC ready for 65nm X Architecture designs
Taiwan Semiconductor Manufacturing Co. Ltd (TSMC) and United Microelectronics Corp. (UMC) recently announced that they have validated Cadence Design Systems Inc.'s X Architecture for 65nm production.
2013-09-20 TSMC unveils 16nm FinFET design flows, uses Cortex-A15 core
TSMC's design flows include one for the company's 16FinFET process, one customised for 16FinFET that offers transistor-level design and a 3D-IC flow for the design of vertically stacked structures.
2005-06-13 TSMC releases reference design flow for 65nm processes
Taiwan Semiconductor Mfg Co. Ltd has released version 6.0 of its reference flow, the sequence of EDA tools that the world's largest foundry recommends for its 65nm manufacturing processes.
2012-10-11 TSMC releases 20nm, CoWoS design reference
The silicon-validated CoWoS Reference Flow enables multi-die integration to support high bandwidth, low power and can achieve fast time-to-market for 3D IC designs.
2006-07-20 TSMC reference flow integrates Cadence platforms
Cadence and TSMC announced the integration of the Cadence's Encounter digital IC design platform and Allegro system interconnect platform into TSMC's Reference Flow 7.0.
2004-06-07 TSMC Reference Flow 5.0 includes Optimal tools
TSMC's Reference Flow 5.0 addresses two nanometer integrity issues that are observed at both the IC and package design levels - power closure and timing closure.
2003-06-04 TSMC latest reference flow adopts Cadence platform
TSMC has selected Cadence Design Systems Inc.'s Encounter digital IC design platform as an integral part of TSMC's latest Reference Flow 4.0.
Bloggers Say

Bloggers Say

See what engineers like you are posting on our pages.

?
?
Back to Top