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2003-01-08 TSMC, Synopsys partner to ensure library-flow compatibility
TSMC and Synopsys Inc. have collaborated to guarantee that TSMC's internally developed Nexsys 90nm libraries are fully compatible with Synopsys' RTL to GDSII flow.
2006-09-07 Synopsys, SMIC team on ref design flow 3.0
Synopsys Inc. and Semiconductor Manufacturing International Corp. announced that they have jointly developed and deployed reference design flow 3.0
2005-01-20 Synopsys develops reference design flow with China's chip foundry
Synopsys Inc. and Grace Semiconductor Mfg Corp., an IC foundry in Shanghai, China, have jointly developed a reference design flow for Grace's 180nm processes
2005-11-21 SMIC, Magma offering RTL-to-GDSII flow for 130nm SoCs
Magma Design Automation Inc. and Semiconductor Manufacturing International Corporation (SMIC) have made available a validated reference flow based on Magma's Blast Create, Blast Plan Pro, Blast Fusion and Blast Power for system-on-chips (SoCs) targeted at SMIC's 130nm process
2003-10-15 SMIC reference flow includes Magma IC solution
Magma Design Automation Inc. and Semiconductor Manufacturing International Corp. have released a validated reference flow
2011-01-20 RTL-to-GDSII reference flow launched
Magma Design Automation announced the availability of a hierarchical RTL-to-GDSII reference flow for the Common Platform alliance's 32/28nm low-power process technology.
2002-06-05 RTL-to-GDSII flow shows signs of maturity
The RTL-to-GDSII design flow will take center stage at next week's Design Automation Conference in New Orleans, as several vendors show new technologies intended to solidify an all-in-one flow.
2004-10-29 Magma, LogicVision deliver integrated RTL-to-GDSII flow
Magma Design Automation Inc. and LogicVision Inc. have reached an agreement under which the companies will deliver complete interoperability between LogicVision's icBIST and Magma's Blast Create and Blast Fusion products.
2004-05-06 Magma flow adds power analysis
Magma said a new tool lets designers set a timing budget and implement a design with the proper balance of power, timing and area.
2002-09-23 Cadence adds Plato routing engine to design flow
Cadence Design Systems Inc. is upping the ante in the RTL-to-GDSII IC design tool arena with the latest release of its SoC physical implementation tool
2008-08-22 Breaking the gigahertz speed barrier with an automated flow using commercial standard cell libraries and memories
This paper highlights how the collaborative efforts of MIPS Technologies and Synopsys resulted in an automated RTL-to-GDSII flow.
2005-11-23 Synopsys, UMC partner on low power 90nm reference flow
EDA giant Synopsys Inc. and Taiwanese foundry United Microelectronics Corp. (UMC) Monday (Nov. 21) announced the availability of a 90nm reference design flow that is said to be optimized for low-power system-on-chip (SoC) designs
2007-01-11 Synopsys, UMC enhance 90nm ref flow
Synopsys and UMC have collaborated to add new capabilities to the reference design flow based on Synopsys' Galaxy design platform for UMC's 90nm process
2007-11-09 Synopsys, UMC co-develop 65nm reference flow
Synopsys and UMC have co-developed a 65nm hierarchical, multivoltage RTL-to-GDSII reference design flow.
2008-03-18 Synopsys, SMIC tip 90nm reference design flow
Synopsys Inc. and SMIC have released an enhanced 90nm hierarchical, multivoltage RTL-to-GDSII reference design flow that benefits from advanced synthesis, design-for-test and DFM capabilities.
2004-09-03 Synopsys solutions to support IPCore design flow
Synopsys Inc. disclosed that China-based IPCore Technologies Corp. has signed a multi-million dollar agreement.
2005-07-22 SMIC and Synopsys announce reference design flow 2.0
Synopsys Inc. and Semiconductor Manufacturing International Corp. (SMIC) said Tuesday (July 19) that they have developed a new RTL-to-GDSII reference flow based on Synopsys' Galaxy design platform and SMIC's 130nm process
2005-07-22 SMIC and Synopsys announce reference design flow 2.0
Synopsys and SMIC said they have developed a new RTL-to-GDSII reference flow based on Synopsys' Galaxy design platform and SMIC's 130nm process
2009-04-23 Sign-off flow to speed up product dev't
Taiwan Semiconductor Manufacturing Co. Ltd has rolled out a mixed-signal/RF design kit and a foundry-specific integrated sign-off flow designed to accelerate product development process
2012-06-29 Reference flow pushes low power design
Synopsys' 40nm SMIC-Synopsys RTL-to-GDSII version 5.0 reference design flow features automated clock mesh synthesis and a gate array engineering change order flow.
2006-09-12 Magma, SMIC partner on 90nm ref flow
Magma Design Automation and SMIC announced the availability of an advanced IC implementation reference flow for SMIC's 90nm low-power process
2004-09-17 Magma creates structured ASIC flow for ChipX
Magma and ChipX have put together a unified RTL-to-GDSII design flow based on Magma's Blast Create and Blast Fusion for designers targeting ChipX structured ASICs.
2006-04-17 IC design flow integrated
Synopsys offers its customers the Pilot Design Environment, an integrated RTL-to-GDSII design system tailored to each customer's design infrastructure
2005-11-07 DongbuAnam, Synopsys develop 130-nm reference flow
Korean wafer foundry DongbuAnam Semiconductor Inc. and EDA giant Synopsys Inc. have jointly developed a reference flow for DongbuAnam's 130nm process, the companies said Friday (Nov. 4
2006-05-26 Dongbu, Cadence offer RTL-to-GDSII reference flow
South Korean foundry Dongbu Electronics said that it has collaborated with Cadence Design Systems Inc. to jointly develop the DBE 130.2 reference flow
2002-06-13 Dataquest predicts automation of RTL
The "automation of RTL" will be driven by the silicon virtual prototype and the intelligent testbench, according to Gary Smith, chief EDA analyst at Gartner Dataquest
2007-04-25 Common Platform partners deliver 65nm reference flow
Cadence Design Systems Inc. announced the immediate availability of the 65nm Common Power Format (CPF) enabled reference flow targeting the Common Platform technology
2004-09-10 Cadence, UMC create sub-130nm IC reference flow
Cadence Design Systems Inc. and foundry United Microelectronics Corp. have announced an RTL-to GDSII reference flow for digital IC designs implemented in UMC's 130nm and lower processes.
2006-09-08 Cadence, SMIC co-develop digital ref flow for 90nm tech
Cadence Design Systems and SMIC announced that they have jointly developed the low-power digital reference flow to support SMIC's advanced 90nm process technology
2003-09-19 Cadence, ARM release 'reference flow
Cadence Design Systems and ARM have announced the ARM-Cadence Reference Methodology, which is described as a "shrink-wrapped reference flow.&quot
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