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2006-05-18 Cadence extends flow support for ARM processors
Cadence Design Systems has expanded its Reference Methodology flow support of ARM processors to include the new Cortex-R4 processor
2005-10-07 Cadence announces design flow for ARM Cortex-A8 processor
Cadence Design Systems announced the immediate availability of a high-performance design flow for the new ARM Cortex-A8 processor
2011-01-20 32/28-nm reference flow for Common Platform Alliance ushered
Cadence's 32/28nm Low-Power RTL-to-GDSII Silicon Realization Reference features new design intent, abstraction and convergence capabilities giving more deterministic path to advanced silicon
2004-02-02 Choosing the right design flow model with integrated architecture
Users of ASIC, COT and COPD models are finding that flows based on an integrated RTL-to-GDSII system can offer additional benefits when fully leveraged
2002-10-16 Monterey adds Synplicity synthesis to ASIC design
Claiming to have a full RTL-to-GDSII design flow, Monterey Design Systems has added logic synthesis to its Dolphin system.
2006-03-29 STARC adopts Synopsys' IC compiler to boost efficiency
Synopsys Inc. announced that STARC has adopted its IC Compiler in the newly released STARCAD-21 V3.0 production flow
2004-02-09 Magma, CAS to form Nanotechnology design lab
Magma Design Automation Inc. has signed an agreement with the Chinese Academy of Sciences (CAS) agreement to establish the Nanotechnology Integrated Circuit Design Lab.
2004-10-22 Cadence, Magma establish timing model standard
Magma Design Automation Inc. has disclosed that its IC implementation system supports the effective current source model (ECSM) from Cadence Design Systems Inc.
2007-06-27 TSMC qualifies Magma Quartz tech for 65nm, 0.13?m
Magma Design Automation Inc. announced that Taiwan Semiconductor Manufacturing Co. has qualified Quartz RC extraction technology files for 65nm, 90nm and 0.13?m designs.
2004-12-01 Tools alone don't make industry
The EDA industry is still struggling with flat revenues and declining bookings. What's going on?
2005-08-16 Tool gets a handle on voltage changes
As a chip designer for Intel Corp., Srikanth Jadcherla spent a lot of time working on multivoltage designs. Now he's launched an EDA startup, ArchPro Design Automation Inc., which is rolling out what it presents as the industry's first multivoltage RTL simulation product
2007-04-02 Synopsys design platforms support UPF 1.0
Synopsys Inc. has announced a low-power design flow that will implement the Accellera Unified Power Format version 1.0 in its IC verification and implementation products in the second half of 2007
2009-03-18 Synopsys aims to accelerate chip development
Synopsys is making available an automated chip development environment that the company says combines an RTL-to-GDSII design flow with productivity-enhancing features to accelerate chip development while mitigating the risks of designing at new process nodes.
2002-05-22 SYCS licenses Magma's Blast Chip
Synergetic Computing Systems has licensed Magma Design Automation Inc.'s Blast Chip for its combined RISC and DSP multiprocessor architecture called the SYNPUTER.
2004-03-01 Starc to release Starcad-21 design methodology
Semiconductor Technology Academic Research Center will release v1 of a chip design methodology that covers silicon implementation from RTL to GDSII
2002-05-09 Samsung endorses STA in BuildGates, Cadence PKS software
Samsung Electronics Co. Ltd has issued a sign-off endorsement for the static timing analysis (STA) technology embedded within BuildGates synthesis and Cadence Physically Knowledgeable Synthesis (PKS) software for ASIC design flows.
2003-09-16 Redefining design for yield, manufacturability
By adopting a more design-driven approach to production, many of the yield and manufacturing issues daunting the semiconductor industry can be addressed before they even occur.
2005-06-30 Magma, SMIC forge design service partnership
Magma Design Automation Inc. and Semiconductor Manufacturing International Corp. Tuesday (June 28) announced a partnership by which SMIC's Design Service division will adopt Magma's RTL-to-GDSII design solution for its ASIC design projects and Magma's SiliconSmart products for characterization and model creation of libraries and macros
2004-10-28 Magma teams with Mentor and Logic Vision for test tools
Magma Design Automation Inc. is ensuring its Blast RTL to GDSII tool lineup works with popular test tools, as the company announced interoperability partnerships separately with Mentor Graphics and Logic Vision
2006-10-18 Hua Hong NEC, Synopsys team up for reference design
Synopsys and Hua Hong NEC announced their jointly developed Reference Design Flow 2.0 for Hua Hong NEC's 0.18?m process
2004-09-14 eSilicon tapes out SoC to TSMC process using Magma system
eSilicon Corp. has taped out a 0.18?m SoC design to TSMC's LV process using Magma's Blast Create and Blast Fusion, an integrated RTL-to-GDSII design flow.
2005-05-27 EDA vendors announce flows for IBM-Chartered 90nm process
IBM and Chartered Semiconductor Mfg added common design support to their jointly developed 90nm process platform.
2005-04-08 EDA development going in-house, analyst says
Citing an ominous warning for EDA vendors, Gary Smith, chief EDA analyst at Gartner Dataquest, said at the International Symposium on Physical Design (ISPD) here that design teams are increasingly developing their own EDA tools in-house.
2008-12-05 Digital implementation platform promises scalabilities
Cadence Design Systems Inc. rolled out Encounter Digital Implementation System, RTL-to-GDSII configurable digital implementation platform geared toward the 45nm and 32nm nodes
2002-04-30 Deep-submicron flows need an overhaul, designers say
Design flows for deep-submicron ICs need an overhaul, attendees of last week's Electronic Design Processes (EDP-2002) workshop agreed.
2004-12-08 Dataquest issues 2004 EDA market report
The lack of new 65nm and 45nm tools will slow revenue growth in 2004 and 2005 and the EDA industry will report $4.2 billion in revenue for 2004.
2007-12-12 Cadence, ARM co-develop multicore ref design kits
Cadence Design Systems Inc. and ARM have jointly developed reference methodologies, one for the ARM11 MPCore multicore processor and the other for low-power implementation of the ARM1176JZF-S processor.
2002-05-22 Cadence overhauls IC implementation suite
Aiming to speed timing closure and signal integrity analysis, Cadence Design Systems Inc. this week will announce an across-the-board update to its SP&R (synthesis, place and route) IC implementation suite.
2003-09-02 Cadence brings 0.5?m design kit to China
Cadence Design Systems and IPCore Technologies jointly announced that they have cooperated to develop the first digital design kit for Central Semiconductor.
2004-07-01 Apache adds power grid generation
EDA startup has unveiled the SkyHawk add-on to Apache's RedHawk-SDL power tool that automates power grid generation.
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