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2002-09-11 Entegris, Tru-Si partner on wafer handling initiative
Entegris Inc. and Tru-Si Technologies have formalized a nonexclusive open alliance to support thin silicon wafer handling in the semiconductor industry
2005-04-15 Honeywell offers wafer thinning materials for semiconductor production
Honeywell has announced the availability of wafer thinning materials as part of its product portfolio for semiconductor manufacturing.
2002-01-09 ChipPAC qualifies 300mm wafer packaging
ChipPAC Inc., a provider of semiconductor assembly and test services, has qualified all of its front-end assembly operations in the 300mm wafer packaging
2015-06-29 OSATS: Wafer-level packaging limitations hard to dismiss
The recent SEMI Packaging Tech Seminar focused on the need, in terms of under yield and packaging cost pressures, to move from fan-out wafer-level-packaging to fan-out panel-level-packaging
2013-08-30 Imec, Entegris team up on 3D wafer handling
The organisations are working on a solution to safely transfer and handle multiple kinds of 3D IC wafers without the risk of breakage and other damage that may occur during the 3D production process.
2009-07-21 EVG, Applied ink 3D wafer bonding deal
EV Group (EVG) has partnered with Applied Materials Inc. to develop wafer bonding processes for the manufacture of through-silicon vias (TSVs) in 3D IC packaging applications
2011-04-11 TSMC enters chip-packaging arena
TSMC will soon open a bumping facility and offer silicon interposers and TSV technologies for 3D chips, but will remain focused on the foundry market and will not compete against subcontractors.
2007-04-25 Samsung develops 'first' all-DRAM stacked package using TSV tech
Samsung claims to develop the 'first' all-DRAM stacked memory package using 'through silicon via' technology, which will result in memory packages that are faster, smaller and consume less power.
2009-04-01 Joint effort aims to enable 3D semiconductors
Applied Materials Inc. and Disco Corp. have announced a joint effort to develop wafer thinning processes for fabricating through-silicon vias (TSVs) in 3D semiconductors
2005-02-11 Honeywell opens electronic materials production facility
Honeywell announced that its electronic materials business has opened a new, 40,000-square-foot manufacturing facility in Chandler, Arizona, boosting Honeywell's capabilities to supply both straight and advanced customized electronic chemicals for the semiconductor industry
2006-07-20 U.S. seeks to change rules on China exports
The U.S. Department of Commerce is seeking to change the rules regarding high-tech exports to China, some of which are intended to make it easier to sell semiconductor equipment into its growing IC market
2016-03-17 SiC ready: X-Fab offers 6in SiC from Texas foundry
X-Fab has upgraded the manufacturing process at its wafer fab in Lubbock, Texas, in order to start supplying 6in SiC wafers
2002-05-22 Researchers seek 'green' chip-fabrication techniques
A research team at the University of Arizona is working to develop environmentally friendly chip-fabrication chemistries that consume fewer resources and produce fewer hazardous byproducts than conventional techniques.
2006-08-03 Freescale cuts die area, thickness with new chip packaging tech
Freescale's proprietary redistributed chip packaging technique delivers about a 30 percent reduction in packaged-die area and thickness.
2007-10-25 STATS ChipPAC opens second China facility
STATS ChipPAC has announced the opening of a second manufacturing facility in Shanghai, China.
2013-07-10 Dow Corning boards Imec's 3D IC packaging initiative
Dow Corning has teamed up with Imec to advance enabling technologies for 3D IC semiconductor packaging
2011-06-28 3M opens innovation center in Taiwan
3M's application laboratory in Yangmei, Taiwan will provide support for 3D ICs and ultra-thin wafer handling for the semiconductor industry
2014-02-19 Tips for cost-effective 3D IC production
Know how to distribute the cost-of-ownership across the supply chain.
2005-10-20 STATS ChipPAC wants to be 3D king
Nearly two years after the big merger, Singapore's STATS ChipPAC Ltd is treading slightly above stormy waters in the competitive chip packaging and test market.
2013-01-31 Open ecosystem team up spawns 3D IC
STATS ChipPAC and UMC unveiled a 3D chip stack, consisting of a Wide I/O memory test chip stacked upon a TSV-embedded 28nm processor test chip, which boasts package-level reliability success.
2014-06-16 Kingyoup bonding equipment addresses miniaturisation
The temporary bonding and de-bonding equipment enables 3D ICs, 2.5D packaging integration and system applications. It promises throughput of over 60 wafers to 100 wafers per hour.
2012-08-09 Improve SoC yields with diagnostic and repair tools for embedded memory
Learn about embedded memory test solutions, including fault detection in very deep submicron technologies, repair at the manufacturing level, as well as diagnosis for process improvement and field repair capabilities.
2015-07-03 Examining 3D embedded substrate power packaging
Here is a look at 3D embedded substrate power packaging technologies, which will be increasingly deployed in everything from cell phones to hybrid electric vehicles.
2010-06-23 Elpida, PTI, UMC team on 3D IC integration for 28nm
Elpida Memory Inc., Powertech Technology Inc. (PTI), and United Microelectronics Corp. have reached a three-way cooperation to advance 3D IC integration technologies for advanced processes including 28nm.
2007-10-25 EDA's big three unready for 3D chip packaging
Without design tools to allow exploration and tradeoffs to be made in 3D layouts, engineers are restricted to design in two dimensions and occasionally stack chips crudely. But without a clear market for 3D design EDA vendors are unlikely to offer tools.
2012-02-03 Advances in 3D-IC testing
Read about the design-for-3D-test architecture and implementation flow developed by researchers at Industrial Technology Research Institute based on the Synopsys test solution.
2012-06-07 A*STAR, UMC team up on TSV tech
The resulting technology will substantially enhance performance, lower costs and shrink the size of multimegapixel image sensors found in mobile applications, the companies said.
2014-02-06 3D TSV Summit underscores cost-effective production
From a maker's perspective, 3D IC production will only ramp up if the added costs for implementing TSVs and all the ensuing steps can be largely compensated by the IC performance benefits.
2008-07-31 Ultrafast 3D circuit enables higher switching capacity
The Berlin-based Ferdinand Braun Institute for Ultra-High Frequencies (FBH) has launched an IC process that enables transistors switching at frequencies of well beyond 200GHz.
2008-09-05 Sharp catches up on 'cool' handset craze
A look inside Sharp's 922SH mobile phone yields insights into whether the Japanese remain ahead of their global counterparts.
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