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2001-08-30 Clock recovery from phase-encoded data
This application note describes the simulation of a clock recovery circuit for phase-encoded data
2003-03-06 Cadence takes part of FlexRay Consortium
Cadence Design Systems Inc. has joined the FlexRay Consortium as a tool development member
2002-06-21 Cadence custom environment handles mixed-signal IC designs
Cadence Design Systems Inc. has introduced a mixed-signal design environment for custom ICs.
2001-08-30 Blind equalization of mobile fading channels
This application note demonstrates the performance of conventional blind equalization techniques applied to equalization of mobile communication channels. It also presents an optimal decision-directed blind equalization algorithm.
2001-04-26 Behavioral modeling of RF circuits in Spectre
This application note describes typical issues encountered in the behavioral modeling of RF circuits using the RF library.
2013-10-07 Ansys tech enables modelling of mm-wave for wireless comms
ANSYS's partnership with Imec allows the research centre to use ANSYS' modelling tools to perform advanced research on antenna design and antenna/package-chip co-design in integrated mm-wave SiPs.
2001-08-30 Analog modulation and demodulation
This application note describes the capability of Capsim to simulate modulated and demodulated analog signals. It presents three example simulations: DSBSC with carrier recovery, SSB modulation/demodulation and FM.
2001-04-26 An introduction to the PLL library
This application note describes where the PLL library fits in a design flow, and discusses the phase-domain models of PLLs.
2001-03-28 An introduction to active-HDL Sim
This application note provides a brief discussion to the Active-HDL Sim functional simulator. The discussion includes installing/uninstalling the simulator, creating an 1164/VHDL simulation model, the simulation process, and applying stimulus
2001-09-27 An interpolating delay line
This application note details the design of an interpolating digital delay line within SystemView operator library.
2001-09-27 Alias (Spur) reduction in sampled systems using the 32-bit version of SystemView by ELANIX
This application note demonstrates three ways to reduce aliasing in sampled systems using Elanix's SystemView simulation tool.
2005-05-04 Agilent, CST enhance integration for RF and MW circuit design
Agilent Technologies Inc. and Computer Simulation Technology (CST) have made two significant advances in the integration of CST's Microwave Studio simulation tool with Agilent's Advanced Design System (ADS) software, the companies.
2002-06-13 Agilent, Cadence partnership shows RF simulator
The Agilent RF Design Environment is a software platform that tightly integrates Agilent's RF simulation technologies into Cadence's analog/mixed-signal design flow
2003-07-28 Agilent taps startup's Verilog-A compiler
Adding behavioral modeling to its analog design tool suites, Agilent announced an agreement to integrate Verilog-A modeling technology from Tiburon-DA
2015-07-30 ADI RF design tools now support Hittite products
Analog Devices acquired Hittite in 2014 and now offers the broadest portfolio of RF and microwave products covering the entire signal chain.
2001-04-26 Accurate Fourier analysis for circuit simulators
This application note presents an accurate and flexible approach to Fourier analysis, which is based on the direct computation of the Fourier integral, within the context of circuit simulation
2001-06-06 A user's guide to envelope following analysis
This application note describes how to use Envelope Following Analysis with SpectreRF.
2001-09-27 A SystemView Logic Example: An All Digital Method (Almost) Of Measuring Two Pulse Widths And Generating A 3rd Pulse Width That Is A Function Of The 1st Two Pulse Widths
This application note demonstrates an almost digital method of manipulating and measuring PWM signals in the SystemView simulation tool.
2001-09-27 A Methodology For Combining System Level And Circuit Level Simulators To Examine Trade-Offs, Constraints, And Second-Order Effects For Wireless Designs
This application note provides a combined analysis of circuit-level and system-level simulation to aid RF design engineers in examining the pros and cons of each simulation level
2005-06-14 You can do better, survey tells EDA
More than 1,000 EDA tool users are handing their vendors a report card at the Design Automation Conference here this week, and the grades can best be described as incomplete
2008-04-21 XtremeDSP ver10.1 improves DSP, ESL design
Xilinx has made available versions 10.1 of the System Generator for DSP tool and the AccelDSP synthesis tool, the development environment delivered by the Xilinx XtremeDSP solution
2004-06-09 Xilinx releases latest version of System Generator
Xilinx released the v6.2 of its System Generator for DSP development tool that fully supports the Matlab 7 and Simulink 6 software packages
2003-12-18 Xilinx platform accelerates FPGA-based DSP design
Xilinx Inc. has announced that it is shipping its next generation System Generator for DSP tool v.6.1 that allows designers to link their custom boards via a generic JTAG interface and reduce overall simulation time.
2005-05-09 Xilinx introduces new design tools for its DSPs
Xilinx introduced new design tools aimed at easing the implementation of high sample rate or multi-channel signal processing designs onto Xilinx DSP devices.
2006-03-16 What-If tools for everyone
Here is a comprehensive tool set providing an iterative, what-if analysis that engineers can run before PCB layout begins
2013-07-22 Virtual design, verification for e-Mobility
Learn how to address many of the emerging engineering challenges that carmakers now face.
2003-12-01 Verisity plans manager for verification
To build its franchise beyond testbench generation tools, Verisity Ltd is developing what it calls an "intelligent testbench."
2005-02-08 V6 automation tools speed SoC, embedded system design
Tensilica announced its V6 suite of automation tools, which significantly speed the design of major blocks in SoC design.
2004-12-03 Updated Altium PCB design system include new technologies
A new PCB design system for layout professionals was recently released by Altium Ltd.
2012-10-17 TSMC names EDA partners for CoWoS, 20nm
TSMC has validated technologies from Cadence, Mentor and ANSYS for use in its 20nm and CoWoS design infrastructure.
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