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2003-05-23 AsusTeK adopts Cadence tool for PCB development
Taiwan-based AsusTeK Computer Inc. has selected Cadence Design Systems' SPECCTRAQuest design solution for its PCB motherboard designs.
2002-10-09 Apache's Tomahawk tool analyzes power, IR drop
EDA startup Apache Design Solutions Inc. has released the Tomahawk-S static analysis tool that looks at power, IR drop, and electromigration
2004-02-03 Apache tool additions jazz up NSpice simulation
Physical-design-integrity startup Apache Design Solutions Inc. has introduced two new versions of its NSpice simulator: NSpice-PI and NSpice-UBS.
2002-06-13 Ansoft signal-integrity tool produces accurate 3D models
Equipped with the company's multi-partial element equivalent circuit technology, the Spicelink v5.0 signal-integrity tool from Ansoft Corp. is capable of producing accurate, three-dimensional, distributed models for gigabyte data-rate designs
2002-04-03 Ansoft integrates Simplorer into automotive evaluation tool
Ansoft Corp. has announced the integration of its Simplorer electrical system simulator into the Advanced Vehicle Simulator automotive evaluation tool of the National Renewable Energy Laboratory
2006-08-10 Analysis tool offers 'sanity check' for parasitic networks
French startup Edxact S.A. has introduced Comanche, a parasitic analysis tool that offers a 'sanity check' for extracted netlists so gross violations can be found before simulation.
2003-05-08 Analysis tool combines dynamic, static timing methods
Nassda Corp.'s HANEX circuit-level timing and crosstalk analysis tool is targeted for use in digital designs of 130nm and below
2008-07-02 Altera tool builds DSP design in minutes
Targeting high-performance DSP designs, Altera Corp. rolled its DSP Builder tool version 8.0, featuring second-generation model-based synthesis technology
2003-08-01 Altair integrates wire harness design to EDA tool
Altair Engineering has announced that their HarnessLink wiring design tools will be fully integrated with Ansoft's Simplorer simulation software
2003-10-21 Aldec upgrades dual language simulation environment
Aldec has unveiled a new version of its Riviera dual language simulation environment featuring a two-fold performance increase over the previous version
2002-01-10 Aldec rolls out fast, fully automated FPGA design verification tool
Claimed to be the fastest, most fully automated FPGA design verification tool, Active-HDL 5.1 addresses the latest design trends in the EDA industry, the company says
2014-01-09 Agilent rolls RFIC simulation, verification, analysis tool
The GoldenGate 2013.10 claims to provide RFIC designers with easy-to-use EVM-, BER- and ACPR-type measurements and enables them to analyze and diagnose problem areas in large-signal analysis.
2003-02-05 Agilent adds MMIC, simulation features to EDA tool
The company is preparing a new version of its popular Advanced Design System EDA tool set with features supporting monolithic microwave IC design
2002-09-05 Agere adopts Nassda simulator tool
Agere Systems has selected Nassda Corp.'s HSIM hierarchical full-chip simulator and analysis tool for advanced timing analysis of clock trees and memory characterization of its ASIC solutions
2004-06-03 Adveda modeler connects RTL, SystemC simulation
Adveda introduced a model generator simulation add-on that places a SystemC or PLI wrapper around RTL code so Adveda's fast models can be used with established top-down and bottom-up verification environments
2014-11-18 Addressing the problem of X unknowns in simulation
The sheer complexity and common use of power management schemes raise the probability of an unknown X state in the design, translating into a functional bug in the final chip.
2002-04-04 AccelChip tool synthesizes Matlab designs
AccelChip Inc. believes it has cracked a longstanding design problem with a new tool that creates synthesizable Verilog and VHDL code from Matlab and Simulink designs for use in Xilinx or Altera FPGAs
2002-12-03 ACAD EDA tool identifies peak IR drop values
The company has released its FinePower dynamic power and IR drop analysis tool for SoCs that is capable of identifying peak IR drop values
2004-05-07 ACAD analysis tool achieves SPICE-level accuracy
ACAD has disclosed that its new FineSim hybrid simulation analysis tool can achieve SPICE-level accuracy.
2007-05-25 45nm-capable memory characterization tool unveiled
Legend Design Technology has upgraded its CharFlo-Memory toolset to address memory characterization at 45nm and below.
2010-10-18 3D modelling tool eases verification
Coventor Inc.'s 3D modeling tool for MEMS chip design now enables design engineers to use Mathlab's Simulink behavior modeling tools to verify that the design functions correctly
2004-05-18 0-In tool verifies metastability effects
Claiming a "breakthrough" solution for the automatic verification of metastability effects, 0-In Design Automation is preparing Archer CDC-FX, an addition to its clock-domain crossing (CDC) verification tool
2006-12-22 Wireless library tool eases 3GPP LTE designs
Agilent's 3GPP LTE Wireless Library is expected to help speed the development of 3GPP LTE designs.
2007-12-18 Verification tool speeds up RFIC designs
Agilent Technologies has developed the GoldenGate Plus for RFIC simulation, analysis and verification
2011-04-21 Verification tool offers advanced analysis, debug
Synopsys, Inc. has introduced the CustomExplorer Ultra mixed-signal verification environment that offers a comprehensive regression analysis.
2001-07-16 Validate EMC design rules with 3D simulation
This article provides an overview of EMC- and 3D-analysis tool capabilities that can enhance an your design's performance
2007-05-31 Tool tackles power integrity issues in ICs, packages, boards
Aiming to deliver a comprehensive solution for tackling noise and power at the chip, I/O and PCB design levels, Apache Design Solutions announced its Sentinel product line.
2007-05-18 Tool speeds up firmware debugging
Striving to meet the demands of firmware developers, Carbon Design Systems announced a new technology called "OnDemand" that speeds the performance of Carbon's Virtual System Prototype (VSP) environment for debugging.
2008-01-24 Tool speeds up design of optoelectronic devices
Acceleware and Synopsys have developed a hardware solution that enables up to 20x faster electromagnetic simulation of optoelectronic devices such as CMOS image sensors
2005-08-16 Tool gets a handle on voltage changes
As a chip designer for Intel Corp., Srikanth Jadcherla spent a lot of time working on multivoltage designs. Now he's launched an EDA startup, ArchPro Design Automation Inc., which is rolling out what it presents as the industry's first multivoltage RTL simulation product
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