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What is analogue simulation?
Modelling or simulation of an electronic circuit using representations of the actual circuit voltages, currents, and component values instead of simplified digital state representations.
total search522 articles
2008-12-19 Trio develops 'world's smallest' FinFET SRAM cell
Toshiba, IBM and AMD have jointly developed an SRAM cell that has an area of only 0.128?m?, the world's smallest functional SRAM cell that makes use of fin-shaped Field Effect Transistors (FinFETs).
2002-09-16 Toshiba, Neolinear formulate new methodology for Soc design
Toshiba and Neolinear teams up to implement a new AMS design methodology that enables significant analog design reuse.
2005-01-31 Toshiba, Celoxica boost C-based SoC design
Combining electronic system level (ESL) design with a platform-based system-on-chip (SoC) solution, Toshiba Corp. and Celoxica Ltd announced Thursday (Jan. 27) a design flow for Toshiba's Media Embedded Processor (MeP) platform based on Celoxica's DK Design Suite of C-based synthesis tools.
2003-07-09 Toshiba uses Tharas devices on verification flow
Toshiba Corp. has selected Tharas Systems' Hammer systems and the Hammer Accelerator Farm to be deployed into its DFT verification flow.
2005-02-11 Toshiba unveils high-density DRAM with floating-body cells
Toshiba Corp. has developed 128Mb silicon-on-insulator (SOI) DRAM with floating-body cells that the chip maker claims will help usher in embedded DRAM chips on SOI wafers.
2003-11-25 Toshiba designer takes path of upward mobility
Delving into 'new transistor technology' is all in a day's work for Toshiba's Shinichi Takagi.
2004-11-22 Toshiba adopts Mentor ADVance MS tool in LSI designs
Mentor Graphics Corp. revealed that Toshiba Corp. has adopted its analog/mixed-signal HDL language, Verilog-AMS, for the design and verification of complex analog and mixed-signal LSI (large scale integration) designs.
2005-03-07 Toolbox enables fixed-point design directly in MATLAB
The MathWorks announced the availability of the new Fixed-Point Toolbox and Simulink Fixed Point, bringing fixed-point design capabilities to MATLAB and enhanced fixed-point simulation in Simulink.
2008-01-24 Tool speeds up design of optoelectronic devices
Acceleware and Synopsys have developed a hardware solution that enables up to 20x faster electromagnetic simulation of optoelectronic devices such as CMOS image sensors.
2006-09-01 Tool compiles C source code to RTL
CebaTech Inc. recently announced plans to offer both TCP/IP intellectual property (IP) and the C-language compiler that was used to create it.
2005-04-01 Tool can cut design cycles by 80%
Analog Devices said that its latest version of its PLL circuit design and evaluation tool helps designers cut design cycles by up to 80 percent.
2005-08-01 Tool buffs up regression testing
AVS provides a browser interface that serves as a control panel for the verification process where jobs can be launched, suspended or terminated.
2006-12-14 Tokyo university, Taiwan firms develop 512-core chip
The University of Tokyo recently finished up work on a 512 core chip in collaboration with Taiwan Semiconductor Manufacturing Co. and Alchip Technologies, a fabless ASIC company also from Taiwan.
2007-09-03 Tips for successful structured ASIC designs
The use of structured ASIC for custom IC design is an increasingly attractive option. This article provides useful tips for structured ASIC designs.
2003-12-11 TI's SETMOS said to extend CMOS life
Texas Instruments Inc., together with researchers at the Swiss Federal Institute of Technology of Lausanne and the U.S Air Force Research Laboratory, have described a potential way to use single electron transistors (SETs) to perform logic functions.
2014-11-20 The ways to verify SoC
In this article, we will start with the discussion on what and why of verification and only then consider the how.
2004-09-13 The MathWorks expands scope for wireless system development
The MathWorks launched two new products designed to expand the scope of model-based design for signal processing and communications apps.
2012-09-21 The golden age of simulation-driven design
Find out what it takes to design for reliability nowadays.
2009-01-29 The bad stuff impacting DDR timing budgets and ways to avoid 'em
Why bother with a DDR "PHY" when some SSTL I/O's with potentially a DLL or PLL slapped together with glue logic will do the trick of interfacing to an SDRAM?
2014-03-19 Test environment for multiple antennas in satellite
Elektrobit developed software-defined radio based environments aimed at satellite operators and infrastructure vendors, enabling them to scrutinize RF link performance.
2002-09-25 Teradiant samples 40Gbps network processor
Teradiant Networks Inc.'s TeraPacket chipset consists of the company's MPE and MTM, allowing the device to operate up to 40Gbps.
2003-06-19 Tensilica IDE eyes SoC hardware, software design
Tensilica has introduced the Xtensa Xplorer, which is claimed as the first IDE for SoC environments.
2005-08-31 Tensilica enhances methodology for 90nm design flow
Tensilica has enhanced its automated configurable processor design methodology to account for common IC design challenges with 90nm process technology.
2007-10-12 Technical computing trends drive distributed, parallel computing apps
Several trends in the technical computing market are driving the rapid creation and use of distributed and parallel computing applications.
2009-03-13 Tech recharges batteries in a snap
Researchers at the Massachusetts Institute of Technology (MIT) have developed a surface treatment that could recharge Li-ion batteries in seconds.
2012-10-23 TCAD eases FinFET design and variability analysis
FinFET is the first fundamental change in transistor architecture since the time MOSFET replaced bipolar transistor as the transistor of choice for logic applications.
2016-04-28 Tackling IoT and Industry 4.0 sensor backplane needs
Read about the configurable analogue architecture that supports the bimodality requirements of the sensor backplane for both IoT and Industry 4.0 applications.
2007-04-26 T-Spice simulator promises up to 80% faster runtimes
Tanner EDA introduced their T-Spice simulator for analog and mixed-signal chip designs, which offers up to 80 percent faster runtimes when used on two-processor, dual-core machines.
2011-10-03 Synthesizers tout 0.37-5.79GHz frequency range
Linear Tech has released a family of integer-N frequency synthesizers with integrated VCO.
2011-12-21 Synthesizer touts -226dBc/Hz in-band phase noise
The LTC6945 comprises a reference buffer, a reference divider, phase-frequency detector with phase-locked indicator and an ultralow noise programmable charge pump.
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