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2008-03-26 Xilinx design tools suit logic, embedded, DSP
Xilinx has introduced its ISE Design Suite 10.1, a single unified release providing FPGA logic, embedded and DSP designers with immediate access to the company's entire line of design tools with full interoperability
2002-05-02 Virage offers multiport memory for SoC designs
Memory designer Virage Logic Corp. intends to market a configurable SRAM-based multiport memory that can perform three R/W operations simultaneously, increasing data throughput in today's embedded systems and meeting the expected demands of parallel or pipelined processors in future SoC designs
2002-01-10 Virage enhances Embed-It memory design platform
Memory library vendor Virage Logic Corp. has enhanced its Embed-It memory design platform with new user-productivity and ease-of-use features
2002-05-24 VIA adopts Avant! Star-SimXT for SoC design verification
VIA Technologies Inc., a developer of PC core logic chipsets, microprocessors, multimedia and communications chips, has selected Avant! Corp.'s Star-SimXT simulator for sign-off verification of its SoC designs
2002-10-01 Verplex: Solutions for correct RTL design implementation
Taiwan started promoting electronics in the 1980s as part of its key economic development initiatives.
2005-09-09 Verisilicon to offer ZSP400-based SoC solutions
Fabless ASIC design foundry VeriSilicon Holdings Co. Ltd has licensed LSI Logic Corp.'s ZSP400 DSP core to strengthen its IP portfolio
2014-12-17 Verifying multi-processor SoC cache coherency
Learn about a highly automated approach to cache coherency verification at the SoC level: generation of test cases to stress every aspect of a multi-processor, multi-memory, multi-level cache design.
2012-04-20 Verification platform geared for SoC, FPGA design
Mentor Graphics' Questa 10.1 release claims to increase productivity with regard to verification and boasts enhanced support of the Universal Verification Methodology.
2002-02-20 VCX, Chartered team to streamline mixed-signal SoC design process
Silicon foundry Chartered Semiconductor Mfg and Virtual Component Exchange have entered into an agreement that designates Chartered as a preferred mixed-signal foundry for VCX partners.
2005-02-08 V6 automation tools speed SoC, embedded system design
Tensilica announced its V6 suite of automation tools, which significantly speed the design of major blocks in SoC design.
2013-06-25 Utilising non-volatile memory IP in SoC designs
Integrating anti-fuse NVM on chip for program storage results to increased margin as well as independence from vagaries of supply chain and component availability.
2002-02-25 UMC taps Wipro, MindTree for design services
Two of India's leading high-tech companies, Wipro Technologies and MindTree Consulting, have signed on to provide design services to Taiwan's UMC
2002-04-16 TSMC to offer SoC design-to-manufacturing services
Taiwan Semiconductor Manufacturing Co. Ltd is moving to better coordinate the design and manufacturing flow for SoC customers with the introduction of a development architecture called Nexsys.
2002-04-11 TransEDA SoC verification tool combines emulation, simulation results
Designed to accelerate SoC verification, TransEDA plc's VN-Cover Emulator allows users to collect coverage data, and merge them with simulation results to measure a design's verification completeness.
2002-09-16 Toshiba, Neolinear formulate new methodology for Soc design
Toshiba and Neolinear teams up to implement a new AMS design methodology that enables significant analog design reuse
2005-01-31 Toshiba, Celoxica boost C-based SoC design
Combining electronic system level (ESL) design with a platform-based system-on-chip (SoC) solution, Toshiba Corp. and Celoxica Ltd announced Thursday (Jan. 27) a design flow for Toshiba's Media Embedded Processor (MeP) platform based on Celoxica's DK Design Suite of C-based synthesis tools.
2002-11-28 Toshiba opens second design center for 2002
Toshiba America Electronic Components Inc. has opened its seventh U.S.-based design center located in San Diego, California, which also is the second design center to be launched by the company this year
2005-01-26 Toshiba obtains power-efficient design using Synopsys Galaxy
Toshiba Corp. has achieved a 40 percent power reduction on its latest 90nm media embedded processor (MeP) system-on-chip (SoC) design using the Synopsys Inc.
2006-08-30 Toshiba adopts Cadence solution for 65nm design
Cadence Design Systems announced that Toshiba has adopted Cadence QRC Extraction for its most advanced 65nm design flows
2011-03-30 Titan mixed-signal design platform picked by iWatt
Magma Design Automation announces that iWatt designers used the Titan platform to set up and route a design in two days, an effort that would have taken more than two weeks to do manually
2006-03-13 TI adopts multidisciplinary approach for 4G design
Texas Instruments is using vertically oriented engineering teams to ensure the success of its fourth-generation wireless design and development efforts
2001-12-01 The work flow of a block-based design team
In the block-based design flow, engineers work with blocks comprising thousands of cells rather than with the individual cells, thus providing a higher level of abstraction necessary for dealing with complex multi-million-gate SoC designs.
2001-06-16 Taiwan's design foundries thriving despite downturn
A design house merely designs an IC; a design foundry provides total solutions from embedded IPs to complex tasks of time-to-market SoC design, production and testing services.
2006-01-01 Taiwan design house innovates to succeed
Design houses have to face important challenges by being more innovative and not "one-hit-wonders" in the electronics design arena
2002-02-16 System specs drive multiprocessor SoC
SoC design requires new tools and a different skill set than traditional ASIC chip design. The case study illustrates new challenges and describes methodologies to address them.
2001-05-08 System integration technologies support SoC design
System integration is a critical bottleneck in the development of system-on-a-chip technologies.
2001-08-01 Synthesize SoCs using C-based design flow
This is a case study in which an SoC was synthesized for Columns Ltd using a C-based design flow.
2010-05-11 Synthesis tool handles complex design verification
NextOp is bridging design and verification with the introduction of an assertion-based verification solution to automatically generate functional coverage properties from testbench and RTL
2004-05-06 Synopsys, UMC develop reference design flow
Synopsys Inc. and UMC have collaborated to develop a reference design flow based on Synopsys' Galaxy Design Platform and UMC's 0.13?m process
2004-05-24 Synopsys releases design platform upgrade
Synopsys launched an upgrade to its design platform that delivers across-the-board improvements in run-time, capacity, QoR, silicon technology support and turn-around time
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