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What is Spartan-3E?
The Spartan-3E is seventh family in the low-cost Spartan Series from Xilinx Inc. Manufactured with advanced 90nm process technology, the series delivers up to 1.6 million system gates, up to 376 I/Os, and a versatile platform FPGA architecture for gate-centric designs. (Souce: Xilinx)
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2008-05-16 Imaging application evaluation platform has Spartan-3 FPGA
TEL's inrevium TB-3S-1400AN-IMG/TB-3S-3400DSP-IMG image application evaluation platform is equipped with Xilinx Spartan-3 AN/A-DSP FPGA.
2000-06-20 How to design today for the upcoming Spartan XL FPGA family
This application note explains how to design a prototype for a Spartan-XL FPGA today. By following the design guidelines presented in this note, such a prototype can easily be converted to using a Spartan-XL device, once the new family becomes available.
2000-06-20 How Spartan series FPGAs compete for gate array production
This application note discusses the enormous progress made by FPGAs in the areas of technology, low price and high performance. It discusses the major advantages of using FPGAs over traditional gate arrays, making FPGAs the best high-volume production solution available today.
2001-04-12 High-speed FIFOs in Spartan-II FPGAs
This application note describes how to build high-speed FIFOs using the Block SelectRAM+ memory in the Spartan-II FPGAs.
2007-03-12 Four- and six-layer, high-speed PCB design for the Spartan-3E FT256 BGA package
This application note addresses low-cost, four- to six-layer, high-volume PCB layout for a Spartan-3E FPGA in the FT256 1mm BGA package. The impact of highspeed signals and signal integrity (SI) considerations for low layer count PCB layouts is also reviewed. This application note is intended for design engineers, managers and PCB layout staff, who are already familiar with SI related design issues. It focuses on the Spartan-3E device in the FT256 package, but the information applies to the equivalent FG256 package, and the general guidelines can be used to optimize board layout for other devices and packages.
2008-09-11 Extended Spartan-3A family overview
The Extended Spartan-3A family of FPGAs solves the design challenges in many high volume, cost-sensitive electronic applications.
2008-09-12 Eliminating I/O coupling effects when interfacing large-swing single-ended signals to user I/O Pins on Spartan-3 Generation FPGAs
This application note describes solutions to receive large-swing signals by design. In one solution (and in the general case of severe positive and/or negative overshoot), parasitic leakage current between User I/O in differential pin pairs may occur, even though the User I/O pins are configured with single-ended I/O standards. This application note addresses the parasitic leakage current behavior.
2008-05-26 Eliminating I/O coupling effects when interfacing large-swing single-ended signals to user I/O pins on Spartan-3 Generation FPGAs
Spartan-3 Generation FPGAs support an exceptionally robust and flexible I/O feature set, such that the signaling requirements of most applications can easily be met. It is possible to program user I/O pins of these families to handle many different single-ended signal standards.
2001-04-12 Data generation and configuration for Spartan series FPGAs
This application note discusses various methods to configure Xilinx's series of Spartan FPGAs.
2008-09-12 Custom PCI timing budgets for Spartan-3 Generation FPGAs
The PCI Local Bus Specification, Revision 3.0 (the PCI specification), defines two timing budgets. One timing budget is for use with 33MHz operation, and the other timing budget is for use with 66MHz operation. These two timing budgets define the I/O timing parameters for compliant 33MHz and 66MHz components.
2008-05-26 Custom PCI timing budgets for Spartan-3 generation FPGAs
The information presented in this application note is applicable to any embedded PCI implementation using Xilinx FPGA devices. The provided example applies this information to a design using Xilinx Spartan-3 Generation FPGAs with Xilinx LogiCORE PCI interfaces.
2001-04-12 Configuring Spartan-II FPGAs from parallel EPROMs
This application note describes a simple CPLD-based interface design to configure a Spartan-II device from a parallel EPROM using the Slave Parallel configuration mode.
2008-09-16 Bulletproof configuration guide for Spartan-3A FPGAs
This application note is a condensed version of the best practices for configuration of Platform Flash PROMs and serves as a guide for a basic configuration setup. The focus of this document is on Spartan-3A FPGAs.
2008-09-22 Advanced security schemes for Spartan-3A/3AN/3A DSP FPGAs
This document identifies the top design security threats, explores the advanced security options, and describes how new, low-cost Spartan-3A, Spartan-3AN, and Spartan-3A DSP FPGAs from Xilinx can help protect your products and profits.
2000-06-29 Adapting ASIC Designs for Use with Spartan FPGAs
This application note demonstrates several guidelines that show how an ASIC design, in the form of an RTL-level HDL file, can be revised to take full advantage of the Spartan series' capabilities to achieve efficient, high-performance implementations.
1999-12-21 Adapting ASIC designs for use with Spartan FPGAs
Pre-existing ASIC intellectual property can be adapted for use with Spartan devices by following a straightforward procedure.
2000-03-20 Adapting ASIC designs for use with Spartan FPGAs
This paper describes a new family of integrated switchers that build on the simplicity of switchers like TOPSwitch but add numerous features without the associated cost. It describes a family of devices that incorporate soft-start, under-voltage lock-out, over-voltage lockout, external current limit, frequency jitter and other features, all incorporated into a single 5-pin package.
2008-09-05 1:7 Deserialization in Spartan-3E/3A FPGAs at speeds up to 666 Mbps
Spartan-3E and Spartan-3A/3AN/3A DSP devices are used in a wide variety of applications requiring 1:7 deserialization at speeds up to 666Mbit/s. This application note targets Spartan-3E devices in applications that require 4bit or 5bit receive data bus widths and operate at rates up to 666 Mbps per line with a clock at 1/7th the bit rate.
2007-03-12 1:7 Deserialization in Spartan-3E FPGAs at speeds up to 666Mbps
Spartan-3E devices are used in a wide variety of applications requiring 1:7 deserialization at speeds up to 666Mbps. This application note targets Spartan-3E devices in applications that require 4-bit or 5-bit receive data bus widths and operate at rates up to 666 Mbps per line with a clock at 1/7th the bit rate. This type of interface is commonly used in flat panel displays and automotive applications.
2002-01-30 Xilinx-Convergent Designs design to integrate DV into IEEE 1394 devices
Xilinx and Convergent Designs announced the availability of Centauri, a DV IEEE 1394 hardware reference design, to provide OEM manufacturers with a low-cost solution for integrating DV over IEEE 1394 devices.
2003-01-27 Xilinx, IR ship motor control design platform
Xilinx Inc. and International Rectifier has released the Accelerator motor control design platform.
2006-11-02 Xilinx unveils new MicroBlaze embedded kit
Xilinx has released the MicroBlaze Development Kit: Spartan-3E 1600E Edition, a comprehensive design environment with everything embedded developers need to create processing-based systems.
2002-04-11 Xilinx unveils latest PLDs at IIC-China
Xilinx has unveiled its latest PLDs at the 7th annual International IC ? China Conference and Exhibition.
2003-04-25 Xilinx unveils 90nm FPGAs
Xilinx Inc. has unveiled its Spartan-3 family of 90nm FPGAs that are designed for high-volume, low-cost applications.
2007-03-15 Xilinx touts 'first' 90nm non-volatile FPGA platform
Built on Xilinx's 90nm Spartan-3 Generation low-cost FPGA fabric, the Spartan-3AN FPGA platform is touted to be the industry's most advanced non-volatile FPGA solution.
2003-03-31 Xilinx to ship 300mm-based FPGAs
Xilinx Inc. has announced that it is shipping all its advanced FPGA product lines on 300mm wafers, including its Virtex-E, Virtex-II, Virtex-II Pro, and Spartan-IIE FPGAs.
2002-04-18 Xilinx ships Gigabit Ethernet IP cores with serial interface
Xilinx Inc. has announced the addition of a gigabit serial interface option to its 1Gb (GMAC) and 10Gb (10 GMAC) Ethernet MAC IP cores for the Virtex-II Pro FPGAs, enabling designers of high-end networking and telecom systems that require higher bandwidth to move from parallel to serial interfaces.
2005-08-25 Xilinx says low-cost PCI Express solution compliant
Xilinx Inc.'s programmable PCI Express endpoint silicon solution has passed the latest PCI Express compliance and interoperability tests, the company announced Tuesday (Aug. 23) at the Intel Developer Forum in San Francisco, California.
2004-06-09 Xilinx releases latest version of System Generator
Xilinx released the v6.2 of its System Generator for DSP development tool that fully supports the Matlab 7 and Simulink 6 software packages.
2004-06-15 Xilinx parts with IBM on 90nm chip production
Programmable logic vendor Xilinx Inc. announced that it does not plan to produce 90nm FPGAs at IBM Microelectronics, and will instead continue to rely on Taiwan's United Microelectronics Corp.
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